๐”– Bobbio Scriptorium
โœฆ   LIBER   โœฆ

Educational design of high-performance arithmetic circuits on FPGA

โœ Scribed by Cappuccino, G.; Cocorullo, G.; Corsonello, P.; Perri, S.


Book ID
114532700
Publisher
IEEE
Year
1999
Tongue
English
Weight
9 KB
Volume
42
Category
Article
ISSN
0018-9359

No coin nor oath required. For personal study only.


๐Ÿ“œ SIMILAR VOLUMES


Design of an RSA Encryption Processor Ba
โœ Michitaka Kameyama; Shugang Wei; Tatsuo Higuchi ๐Ÿ“‚ Article ๐Ÿ“… 1990 ๐Ÿ› John Wiley and Sons ๐ŸŒ English โš– 717 KB

## Abstract This paper proposes an LSIโ€oriented multipleโ€valued hardware algorithm based on the signedโ€digit number (SD number) for highspeed RSA public key encryption processor. A very long wordโ€length arithmetic is required in RSA encryption processing. The proposed algorithm realizes a highโ€spee