Edge triggered pulse latch design with delayed latching edge for radiation hardened application

[ACM Press the 2001 international sympos

[ACM Press the 2001 international symposium - Huntington Beach, California, United States (2001..-..)] Proceedings of the 2001 international symposium on Low power electronics and design - ISLPED '01 - Comparative delay and energy of single edge-triggered & dual edge-triggered pulsed flip-flops for high-performance microprocessors

✍ Tschanz, James; Narendra, Siva; Chen, Zhanping; Borkar, Shekhar; Sachdev, Manoj; 📂 Article 📅 2001 🏛 ACM Press 🌐 English ⚖ 282 KB

Sponsored By Acm/sigda And Ieee Circuits And Systems Society ; With Technical Co-sponsorship From The Ieee Solid-state Circuits Society And The Ieee Electron Devices Society. Acm Order Number 477014--t.p. Verso. Ieee Catalog No. 01th8581--t.p. Verso. Includes Bibliographical References And Author In

[ACM ISLPED'01: Proceedings of the 2001

[ACM ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design - Huntington Beach, CA, USA (6-7 Aug. 2001)] ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design (IEEE Cat. No.01TH8581) - Comparative delay and energy of single edge-triggered and dual edge-triggered pulsed flip-flops for high-performance microprocessors

✍ Tschanz, J.; Narendra, S.; Zhanping Chen, ; Borkar, S.; Sachdev, M.; Vivek De, 📂 Article 📅 2001 🏛 ACM 🌐 English ⚖ 522 KB

Sponsored By Acm/sigda And Ieee Circuits And Systems Society ; With Technical Co-sponsorship From The Ieee Solid-state Circuits Society And The Ieee Electron Devices Society. Acm Order Number 477014--t.p. Verso. Ieee Catalog No. 01th8581--t.p. Verso. Includes Bibliographical References And Author In

[IEEE 2002 IEEE International Symposium

[IEEE 2002 IEEE International Symposium on Circuits and Systems - Phoenix-Scottsdale, AZ, USA (26-29 May 2002)] 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353) - A novel double edge-triggered pulse-clocked TSPC D flip-flop for high-performance and low-power VLSI design applications

✍ Pontikakis, B.; Nekili, M. 📂 Article 📅 2002 🏛 IEEE ⚖ 335 KB