Dual edge-triggered flip-flop with modified NAND keeper for high-performance VLSI

[ACM ISLPED'01: Proceedings of the 2001

[ACM ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design - Huntington Beach, CA, USA (6-7 Aug. 2001)] ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design (IEEE Cat. No.01TH8581) - Comparative delay and energy of single edge-triggered and dual edge-triggered pulsed flip-flops for high-performance microprocessors

✍ Tschanz, J.; Narendra, S.; Zhanping Chen, ; Borkar, S.; Sachdev, M.; Vivek De, 📂 Article 📅 2001 🏛 ACM 🌐 English ⚖ 522 KB

Sponsored By Acm/sigda And Ieee Circuits And Systems Society ; With Technical Co-sponsorship From The Ieee Solid-state Circuits Society And The Ieee Electron Devices Society. Acm Order Number 477014--t.p. Verso. Ieee Catalog No. 01th8581--t.p. Verso. Includes Bibliographical References And Author In