Discrete Time Systems and Signal Processing

✍ Scribed by S. Palani

• Publisher: Springer
• Year: 2023
• Tongue: English
• Leaves: 810
• Edition: 2
• Category: Library

✦ Table of Contents

Preface to the Second Edition
Preface to the First Edition
Contents
About the Author
1 Representation of Discrete Signals and Systems
1.1 Introduction
1.2 Terminologies Related to Signals and Systems
1.2.1 Signal
1.2.2 System
1.3 Continuous and Discrete Time Signals
1.4 Basic Discrete Time Signals
1.4.1 The Unit Impulse Sequence
1.4.2 The Basic Unit Step Sequence
1.4.3 The Basic Unit Ramp Sequence
1.4.4 Unit Rectangular Sequence
1.4.5 Sinusoidal Sequence
1.4.6 Discrete Time Real Exponential Sequence
1.5 Basic Operations on Discrete Time Signals
1.5.1 Addition of Discrete Time Sequence
1.5.2 Multiplication of DT Signals
1.5.3 Amplitude Scaling of DT Signal
1.5.4 Time Scaling of DT Signal
1.5.5 Time Shifting of DT Signal
1.5.6 Multiple Transformation
1.6 Classification of Discrete Time Signals
1.6.1 Periodic and Non-periodic DT Signals
1.6.2 Odd and Even DT Signals
1.6.3 Energy and Power of DT Signals
1.7 Discrete Time System
1.8 Properties of Discrete Time System
1.8.1 Linear and Non-linear Systems
1.8.2 Time Invariant and Time Varying DT Systems
1.8.3 Causal and Non-causal DT Systems
1.8.4 Stable and Unstable Systems
1.8.5 Static and Dynamic Systems
1.8.6 Invertible and Inverse Discrete Time Systems
1.9 Sampling
1.9.1 Sampling Process
1.9.2 Sampling Theorem
1.9.3 Nyquist Rate
1.9.4 Anti-aliasing Filter
1.9.5 Signal Reconstruction
1.9.6 Sampling with Zero Order Hold
1.10 Analog to Digital Conversion
1.11 Quantization
1.11.1 Quantization Error
1.12 Energy Spectral Density of CT Signals
1.13 Power Spectral Density of CT Signals
1.13.1 Properties of Power Spectral Density
1.14 Recursive Systems
2 The z-transform Analysis of Discrete Time Systems
2.1 Introduction
2.2 The z-transform
2.3 Existence of the z-transform
2.4 Connection Between Laplace Transform, z-transform and Fourier Transform
2.5 The Region of Convergence (ROC)
2.6 Properties of the ROC
2.7 Properties of z-transform
2.7.1 Linearity
2.7.2 Time Shifting
2.7.3 Time Reversal
2.7.4 Multiplication by n
2.7.5 Multiplication by an Exponential
2.7.6 Time Expansion
2.7.7 Convolution Theorem
2.7.8 Initial Value Theorem
2.7.9 Final Value Theorem
2.8 Inverse z-transform
2.8.1 Partial Fraction Method
2.8.2 Inverse z-transform Using Power Series Expansion
2.8.3 Inverse z-transform Using Contour Integration or the Method of Residue
2.9 The System Function of DT Systems
2.10 Causality of DT Systems
2.11 Stability of DT System
2.12 Causality and Stability of DT System
2.13 z-transform Solution of Linear Difference Equations
2.13.1 Right Shift (Delay)
2.13.2 Left Shift (Advance)
2.14 Difference Equation from System Function
2.15 Introduction to Fourier Transform
2.16 Representation of Discrete Time Aperiodic Signals
2.17 Connection Between the Fourier Transform and the z-transform
2.18 Properties of Discrete Time Fourier Transform
2.18.1 Linearity
2.18.2 Time Shifting Property
2.18.3 Frequency Shifting
2.18.4 Time Reversal
2.18.5 Time Scaling
2.18.6 Multiplication by n
2.18.7 Conjugation
2.18.8 Time Convolution
2.18.9 Parseval's Theorem
2.18.10 Modulation Property
2.19 Inverse Discrete Time Fourier Transform (IDTFT)
2.20 LTI System Characterized by Difference Equation
2.21 The Convolution Sum
2.22 Response Using Convolution Sum
2.22.1 Analytical Method Using Convolution Sum
2.22.2 Convolution Sum of Two Sequences by Multiplication Method
3 Discrete Fourier Transform and Computation
3.1 Introduction
3.2 Discrete Fourier Transform (DFT)
3.2.1 The Discrete Fourier Transform Pairs
3.2.2 Four-Point, Six-Point and Eight-Point Twiddle Factors
3.2.3 Zero Padding
3.3 Relationship of the DFT to Other Transforms
3.3.1 Relationship to the Fourier Series Coefficients of a Periodic Sequence
3.3.2 Relationship to the Fourier Transform of an Aperiodic Sequence
3.3.3 Relationship to the z-Transform
3.4 Properties of DFT
3.4.1 Periodicity
3.4.2 Linearity
3.4.3 Circular Shift and Circular Symmetry of a Sequence
3.4.4 Symmetry Properties of the DFT
3.4.5 Multiplication of Two DFTs and Circular Convolution
3.4.6 Time Reversal of a Sequence
3.4.7 Circular Time Shift of a Sequence
3.4.8 Circular Frequency Shift
3.4.9 Complex Conjugate Properties
3.4.10 Circular Correlation
3.4.11 Multiplication of Two Sequences
3.4.12 Parseval's Theorem
3.5 Circular Convolution
3.5.1 Method of Performing Circular Convolution
3.5.2 Performing Linear Convolution Using DFT
3.6 Fast Fourier Transform (FFT)
3.6.1 Radix-2 FFT Algorithm
3.6.2 Radix-4 FFT Algorithms
3.6.3 Computation of IDFT Through FFT
3.6.4 Use of the FFT Algorithm in Linear Filtering and Correlation
3.7 In-Plane Computation
4 Design of IIR Digital Filters
4.1 Introduction
4.1.1 Advantages
4.1.2 Disadvantages
4.2 IIR and FIR Filters
4.3 Basic Features of IIR Filters
4.4 Performance Specifications
4.5 Impulse Invariance Transform Method
4.5.1 Relation Between Analog and Digital Filter Poles
4.5.2 Relation Between Analog and Digital Frequency
4.6 Bilinear Transformation
4.6.1 Relation Between Analog and Digital Filter Poles
4.6.2 Relation Between Analog and Digital Frequency
4.6.3 Effect of Warping on the Magnitude Response
4.6.4 Effect of Warping on the Phase Response
4.7 Specifications of the Lowpass Filter
4.8 Design of Lowpass Digital Butterworth Filter
4.8.1 Analog Butterworth Filter
4.8.2 Frequency Response of Butterworth Filter
4.8.3 Properties of Butterworth Filters
4.8.4 Design Procedure for Lowpass Digital Butterworth Filters
4.9 Design of Lowpass Digital Chebyshev Filter
4.9.1 Analog Chebyshev Filter
4.9.2 Determination of the Order of the Chebyshev Filter
4.9.3 Un-normalized Chebyshev Lowpass Filter Transfer Function
4.9.4 Frequency Response of Chebyshev Filter
4.9.5 Properties of Chebyshev Filter (Type I)
4.9.6 Design Procedures for Lowpass Digital Chebyshev IIR Filter
4.10 Frequency Transformation
4.10.1 Analog Frequency Transformation
4.10.2 Digital Frequency Transformation
4.11 IIR Filter Design by Approximation of Derivatives
4.12 Frequency Response from Transfer Function H(z)
4.13 Structure Realization of IIR System
4.13.1 Direct Form-I Structure
4.13.2 Direct Form-II Structure
4.13.3 Cascade Form Realization
4.13.4 Parallel Form Realization
4.13.5 Transposed Direct Form Realization
4.13.6 Transposition Theorem and Transposed Structure
4.13.7 Lattice Structure of IIR System
4.13.8 Conversion from Direct Form to Lattice Structure
4.13.9 Lattice–Ladder Structure
5 Design of Finite Impulse Response (FIR) Digital Filters
5.1 Introduction
5.1.1 LTI System as Frequency Selective Filters
5.2 Characteristic of Practical Frequency Selective Filters
5.3 Structures for Realization of the FIR Filter
5.3.1 Direct Form Realization
5.3.2 Cascade Form Realization
5.3.3 Linear Phase Realization
5.3.4 Lattice Structure of an FIR Filter
5.4 FIR Filters
5.4.1 Characteristics of FIR Filters with Linear Phase
5.4.2 Frequency Response of Linear Phase FIR Filter
5.5 Design Techniques for Linear Phase FIR Filters
5.5.1 Fourier Series Method of FIR Filter Design
5.5.2 Window Method
5.5.3 Frequency Sampling Method
6 Digital Signal Processor
6.1 Introduction
6.2 Multiplier Accumulator (MAC) Unit
6.3 Bus Structures and Memory Access Schemes
6.3.1 Von Neumann Architecture
6.3.2 Harvard Architecture
6.3.3 Multiple Access Memory
6.3.4 Multi-ported Memory
6.4 VLIW Architecture
6.5 Pipelining
6.6 Architecture of TMS320C5x
6.6.1 Bus Structure
6.6.2 Central Arithmetic Logic Unit (CALU)
6.6.3 Auxiliary Register ALU (ARAU)
6.6.4 Parallel Logic Unit (PLU)
6.6.5 Memory-Mapped Registers
6.6.6 Program Controller
6.6.7 Status Registers
6.6.8 On-Chip Memory
6.6.9 On-Chip Peripherals
6.7 Addressing Modes
6.7.1 Direct Addressing
6.7.2 Indirect Addressing
6.7.3 Immediate Addressing
6.7.4 Memory-Mapped Register Addressing
6.7.5 Dedicated Register Addressing
6.7.6 Circular Addressing
6.8 Instruction Sets
6.8.1 Addition/Subtraction Instructions
6.8.2 Multiplication Instruction
6.8.3 Shift/Logical Instructions
6.8.4 Load/Store Instructions
6.8.5 Move Instructions
6.8.6 Branch and Call Instructions
6.8.7 PUSH and POP Instructions
6.8.8 RET Instructions
6.8.9 Repeat Instructions
6.8.10 IN and OUT Instructions
6.8.11 NORM Instruction
6.9 Architecture of 54x
6.9.1 Bus Structure
6.9.2 Internal Memory Organization
6.9.3 Central Processing Unit (CPU)
6.9.4 Pipeline
6.9.5 On-Chip Peripherals
6.9.6 Data Addressing
6.10 Simple Assembly Language Program
Index