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Directed self-assembly process for nano-electronic devices and interconnect

✍ Scribed by Edwin C. Kan; Zengtao Liu


Publisher
Elsevier Science
Year
2000
Tongue
English
Weight
754 KB
Volume
27
Category
Article
ISSN
0749-6036

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✦ Synopsis


Requirements for nano-electronic devices and interconnect in conventional logic circuit architecture are examined to reveal the possible device structure containing self-assembly (SA) features. For integration with lithography, we discuss the features of the SA process and then present a full process flow for a novel type of SA nano-crystal EEPROM cells. The logic functionality below the lithography limit derived from the SA dot arrays and the I -V characteristics including the Coulomb blockade effect are then presented.


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