Digital signal processing with field programmable gate arrays.

✍ Scribed by Uwe Meyer-Baese

• Publisher: Springer
• Year: 2014
• Tongue: English
• Leaves: 949
• Series: Signals And Communication Technology
• Edition: 4
• Category: Library

✦ Table of Contents

Preface to First Edition
Preface to Second Edition
Preface to Third Edition
Preface to Fourth Edition
Contents
1. Introduction
1.1 Overview of Digital Signal Processing (DSP)
1.2 FPGA Technology
1.3 DSP Technology Requirements
1.4 Design Implementation
Exercises
2. Computer Arithmetic
2.1 Introduction
2.2 Number Representation
2.3 Binary Adders
2.4 Binary Multipliers
2.5 Binary Dividers
2.6 Fixed-Point Arithmetic Implementation
2.7 Floating-Point Arithmetic Implementation
2.8 Multiply-Accumulator (MAC) and Sum of Product (SOP)
2.9 Computation of Special Functions Using CORDIC
2.10 Computation of Special Functions using MAC Calls
2.10 Fast Magnitude Approximation
Exercises
3. Finite Impulse Response (FIR) Digital
3.1 Digital Filters
3.2 FIR Theory
3.3 Designing FIR Filters
3.4 Constant Coefficient FIR Design
Exercises
4. Infinite Impulse Response (IIR) Digital
4.1 IIR Theory
4.2 IIR Coefficient Computation
4.3 IIR Filter Implementation
4.4 Fast IIR Filter
4.5 Narrow Band IIR Filter
4.6 All-Pass Filter Design of Narrow Band IIR Filter
Exercises
5. Multirate Signal Processing
5.1 Decimation and Interpolation
5.2 Polyphase Decomposition
5.3 Hogenauer CIC Filters
5.4 Multistage Decimator
5.5 Frequency-Sampling Filters as Bandpass Decimators
5.6 Design of Arbitrary Sampling Rate Converters
5.7 Filter Banks
5.8 Wavelets
Exercises
6. Fourier Transforms
6.1 The Discrete Fourier Transform Algorithms
6.2 The Fast Fourier Transform (FFT) Algorithms
6.3 Fourier-Related Transforms
Exercises
7. Communication Systems
7.1 Error Control and Cryptography
7.2 Modulation and Demodulation
Exercises
8. Adaptive Systems
8.1 Application of Adaptive Systems
8.2 Optimum Estimation Techniques
8.3 The Widrow–Hoff Least Mean Square Algorithm
8.4 Transform Domain LMS Algorithms
8.5 Implementation of the LMS Algorithm
8.6 Recursive Least Square Algorithms
8.7 Comparison of LMS and RLS Parameters
8.8 Principle Component Analysis (PCA)
8.9 Independent Component Analysis (ICA)
8.10 Coding of Speech and Audio Signals
Exercises
9. Microprocessor Design
9.1 History of Microprocessors
9.2 Instruction Set Design
9.3 Software Tools
9.4 FPGA Microprocessor Cores
9.5 Case Studies
Exercises
10. Image and Video Processing
10.1 Overview on Image and Video Processing
10.2 Case Study 1: Edge Detection in HDL
10.3 Case Study 2: Median Filter Using an Image Processing Library
10.4 Case Study 3: Motion Detection in Video Processing Improved by Custom Co-processor
Exercises
Appendix A. Verilog Code of Design Examples
Appendix B. Design Examples Synthesis
Appendix C. VHDL and Verilog Coding
Appendix D. CD-ROM Content
Appendix E. Glossary
References
Index