Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs

✍ Scribed by Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez (auth.)

• Publisher: Springer-Verlag New York
• Year: 2011
• Tongue: English
• Leaves: 215
• Edition: 1
• Category: Library

✦ Synopsis

This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations. As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters.

• Describes efficient procedures for heirarchical top-down design of pipeline converters;
  
  
• Presents new methodologies to reduce bottom-up iterations, through inherent embedding of transistor-level parameters, such as parasitic capacitances, transconductances, and saturation currents;
  
• Provides mathematical details of behavioral models, includes descriptions of the synthesis methods and associated tools and illustrates models through case studies supported by silicon prototypes.
  

✦ Table of Contents

Front Matter....Pages 1-1
Pipeline ADC Overview....Pages 1-28
Design Methodologies for Pipeline ADCs....Pages 29-37
Pipeline ADC Electrical-Level Synthesis Tool....Pages 39-64
Behavioural Modelling of Pipeline ADCs....Pages 65-103
Case Study: Design of a 10bit@60MS Pipeline ADC....Pages 105-170
Experimental Results and State of the Art....Pages 171-183
Conclusions and Future Lines of Research....Pages 185-187
Back Matter....Pages 186-186

✦ Subjects

Circuits and Systems; Signal, Image and Speech Processing; Processor Architectures