Improved cluster matching and design tec
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Hisanori Uda; Madoka Nishikawa; Shigeyuki Murai; Tetsuro Sawai; Akira Ibaraki
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Article
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1998
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John Wiley and Sons
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English
β 154 KB
An impro¨ed cluster matching circuit was proposed in which all of the gates and drains of FETs are connected with microstrip lines, respecti¨ely, and the gate and drain biases are applied without going through a di¨ider or combiner. A method is also proposed for determining circuit constants to pre¨