Design of the ANTARES LCM-DAQ board test bench using a FPGA-based system-on-chip approach
✍ Scribed by S. Anvar; P. Kestener; H. Le Provost
- Publisher
- Elsevier Science
- Year
- 2006
- Tongue
- English
- Weight
- 133 KB
- Volume
- 567
- Category
- Article
- ISSN
- 0168-9002
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✦ Synopsis
The System-on-Chip (SoC) approach consists in using state-of-the-art FPGA devices with embedded RISC processor cores, highspeed differential LVDS links and ready-to-use multi-gigabit transceivers allowing development of compact systems with substantial number of IO channels. Required performances are obtained through a subtle separation of tasks between closely cooperating programmable hardware logic and user-friendly software environment. We report about our experience in using the SoC approach for designing the production test bench of the off-shore readout system for the ANTARES neutrino experiment.