Design of multistage interconnection networks
โ Scribed by Sood, A.K.
- Book ID
- 118682698
- Publisher
- The Institution of Electrical Engineers
- Year
- 1983
- Weight
- 741 KB
- Volume
- 130
- Category
- Article
- ISSN
- 0143-7062
No coin nor oath required. For personal study only.
๐ SIMILAR VOLUMES
## Abstract Although cache control mechanisms for use in multiprocessors that use a multistage interconnection network (MIN) as the interconnecting network have been proposed in which a directory or the cache itself is built into the switches in the MIN, the structure of the switches in these metho
Multistage interconnection networks (MINs) have been widely used in multiprocessor systems and high-speed networks, and the testing of MINs has been investigated by many researchers. However, in previous works the testing results are distributed among all processors, and all those results are needed