✦ LIBER ✦
Design of a low-power, high performance, 8×8 bit multiplier using a Shannon-based adder cell
✍ Scribed by C. Senthilpari; Ajay Kumar Singh; K. Diwakar
- Publisher
- Elsevier Science
- Year
- 2008
- Tongue
- English
- Weight
- 673 KB
- Volume
- 39
- Category
- Article
- ISSN
- 0026-2692
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