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Integrated circuit design verification tools. L. SZANTO Microelectron. Reliab. 24, 259 (1984) Integrated circuit design results in two main data files: data defining a set of masks (D I) which are the final goal of the design and data defining the schematic drawing (D2), which is a convenient form of the circuit function description. In an overview fashion a design verification system is treated in the first part of this paper. It consists of design rule checking and circuit reconstruction from D1, data file D2 translation to schematic diagram description, logic simulation of the two extracted diagrams, and mutual comparison of their technology. In the second part of this paper the following items are discussed in more detail: graphic description language -an extension of CIF for schematic drawing definition, the KOS subsystem for schematic diagram extraction from D2, and the mixed level diagram logic simulator LOMACH-MIXED.
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