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Design, Implementation and On-Chip High-Speed Test of SFQ Half-Precision Floating-Point Multiplier

✍ Scribed by Hara, H.; Obata, K.; Heejoung Park, ; Yamanashi, Y.; Taketomi, K.; Yoshikawa, N.; Tanaka, M.; Fujimaki, A.; Takagi, N.; Takagi, K.; Nagasawa, S.

Book ID: 118254037
Publisher: IEEE
Year: 2009
Tongue: English
Weight: 631 KB
Volume: 19
Category: Article
ISSN: 1051-8223
DOI: 10.1109/tasc.2009.2018039

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