Deep Level Transient Spectroscopic Analysis on Au/SiO2/InP MOS Structures
✍ Scribed by Sumathi, R. R. ;Senthil Kumar, M. ;Kumar, J.
- Publisher
- John Wiley and Sons
- Year
- 1999
- Tongue
- English
- Weight
- 167 KB
- Volume
- 175
- Category
- Article
- ISSN
- 0031-8965
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✦ Synopsis
Deep Level Transient Spectroscopy (DLTS) studies have been carried out on Au/SiO 2 /InP Me-tal±Oxide±Semiconductor (MOS) diodes. Majority and minority carrier traps have been observed for the room temperature SiO 2 deposited samples. The effect of substrate temperature during SiO 2 deposition has been analysed using DLTS. It has been observed that the minority carrier trap is removed while SiO 2 deposition is carried out at an elevated temperature. The detected traps have been analysed under different reverse bias values to distinguish between the bulk and interface traps. R.R. Sumathi et al.: DLTS Analysis on Au/SiO 2 /InP MOS Structures