Cryptographic Hardware and Embedded Systems — CHES 2000: Second International Workshop Worcester, MA, USA, August 17–18, 2000 Proceedings

✍ Scribed by Darrel Hankerson, Julio López Hernandez, Alfred Menezes (auth.), Çetin K. Koç, Christof Paar (eds.)

• Publisher: Springer-Verlag Berlin Heidelberg
• Year: 2000
• Tongue: English
• Leaves: 365
• Series: Lecture Notes in Computer Science 1965
• Edition: 1
• Category: Library

✦ Synopsis

This book constitutes the thoroughly refereed post-proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems, CHES 2000, held in Worcester, MA, USA in August 2000. The 25 revised full papers presented together with two invited contributions were carefully reviewed and selected from 51 submissions. The papers are organized in topical sections on implementation of elliptic curve cryptosystems, power and timing analysis attacks, hardware implementation of block ciphers, hardware architectures, power analysis attacks, arithmetic architectures, physical security and cryptanalysis, and new schemes and algorithms.

✦ Table of Contents

Software Implementation of Elliptic Curve Cryptography over Binary Fields....Pages 1-24
Implementation of Elliptic Curve Cryptographic Coprocessor over GF (2 m ) on an FPGA....Pages 25-40
A High-Performance Reconfigurable Elliptic Curve Processor for GF (2 m )....Pages 41-56
Fast Implementation of Elliptic Curve Defined over GF (p m ) on CalmRISC with MAC2424 Coprocessor....Pages 57-70
Protecting Smart Cards from Passive Power Analysis with Detached Power Supplies....Pages 71-77
Smartly Analyzing the Simplicity and the Power of Simple Power Analysis on Smartcards....Pages 78-92
Power Analysis Attacks and Algorithmic Approaches to their Countermeasures for Koblitz Curve Cryptosystems....Pages 93-108
A Timing Attack against RSA with the Chinese Remainder Theorem....Pages 109-124
A Comparative Study of Performance of AES Final Candidates Using FPGAs....Pages 125-140
A Dynamic FPGA Implementation of the Serpent Block Cipher....Pages 141-155
A 12 Gbps DES Encryptor/Decryptor Core in an FPGA....Pages 156-163
A 155 Mbps Triple-DES Network Encryptor....Pages 164-174
An Energy Efficient Reconfigurable Public-Key Cryptography Processor Architecture....Pages 175-190
High-Speed RSA Hardware Based on Barret’s Modular Reduction Method....Pages 191-203
Data Integrity in Hardware for Modular Arithmetic....Pages 204-215
A Design for Modular Exponentiation Coprocessor in Mobile Telecommunication Terminals....Pages 216-228
How to Explain Side-Channel Leakage to Your Kids....Pages 229-230
On Boolean and Arithmetic Masking against Differential Power Analysis....Pages 231-237
Using Second-Order Power Analysis to Attack DPA Resistant Software....Pages 238-251
Differential Power Analysis in the Presence of Hardware Countermeasures....Pages 252-263
Montgomery Multiplier and Squarer in GF(2 m )....Pages 264-276
A Scalable and Unified Multiplier Architecture for Finite Fields GF ( p ) and GF (2 m )....Pages 277-292
Montgomery Exponentiation with no Final Subtractions: Improved Results....Pages 293-301
Physical Security Devices for Computer Subsystems: A Survey of Attacks and Defenses....Pages 302-317
Software-Hardware Trade-Offs: Application to A5/1 Cryptanalysis....Pages 318-327
MiniPASS: Authentication and Digital Signatures in a Constrained Environment....Pages 328-339
Efficient Generation of Prime Numbers....Pages 340-354

✦ Subjects

Data Encryption; Computer Communication Networks; Special Purpose and Application-Based Systems; Logic Design; Discrete Mathematics in Computer Science