𝔖 Bobbio Scriptorium

✦ LIBER ✦

CRT-Based High-Speed Parallel Architecture for Long BCH Encoding

✍ Scribed by Hao Chen

Book ID: 115506615
Publisher: Institute of Electrical and Electronics Engineers
Year: 2009
Tongue: English
Weight: 86 KB
Volume: 56
Category: Article
ISSN: 1549-7747
DOI: 10.1109/tcsii.2009.2024247

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

High-speed architectures for parallel lo

High-speed architectures for parallel long BCH encoders

✍ Xinmiao Zhang, ; Parhi, K.K. 📂 Article 📅 2005 🏛 IEEE 🌐 English ⚖ 304 KB

[IEEE 2005 IEEE International Workshop o

[IEEE 2005 IEEE International Workshop on VLSI Design and Video Technology, 2005. - Suzhou, China (May 28-30, 2005)] Proceedings of 2005 IEEE International Workshop on VLSI Design and Video Technology, 2005. - Optimized design for high-speed parallel BCH encoder

✍ Zhang Jun, ; Wang Zhi-Gong, ; Hu Qing-Sheng, ; Xiao Jie, 📂 Article 📅 2005 🏛 IEEE ⚖ 613 KB

[IEEE 2011 International Conference on C

[IEEE 2011 International Conference on Communication Systems and Network Technologies (CSNT) - Katra, Jammu, India (2011.06.3-2011.06.5)] 2011 International Conference on Communication Systems and Network Technologies - FPGA Based High Speed BCH Encoder for Wireless Communication Applications

✍ Mehra, Rajesh; Saini, Garima; Singh, Sukhbir 📂 Article 📅 2011 🏛 IEEE ⚖ 349 KB

[IEEE 2010 IEEE International Conference

[IEEE 2010 IEEE International Conference on Wireless Communications, Networking and Information Security (WCNIS) - Beijing, China (2010.06.25-2010.06.27)] 2010 IEEE International Conference on Wireless Communications, Networking and Information Security - High-speed architectures for GHASH based on efficient bit-parallel multipliers

✍ Jimei Wang, ; Guochu Shou, ; Yihong Hu, ; Zhigang Guo, 📂 Article 📅 2010 🏛 IEEE ⚖ 642 KB