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Consideration of logic synthesis and clock distribution networks for SFQ logic circuits

โœ Scribed by A. Akimoto; Y. Yamanashi; N. Yoshikawa; A. Fujimaki; S. Yorozu; H. Terai


Publisher
Elsevier Science
Year
2005
Tongue
English
Weight
185 KB
Volume
426-431
Category
Article
ISSN
0921-4534

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Synthesis of reversible logic for nanoel
โœ Alexis De Vos; Yvan Van Rentergem ๐Ÿ“‚ Article ๐Ÿ“… 2007 ๐Ÿ› John Wiley and Sons ๐ŸŒ English โš– 163 KB

## Abstract Reversible logic circuits can be synthesized hierarchically by dividing them into smaller, more manageable blocks. As all reversible circuits of a certain width __w__ form a group, this problem relates to the partitioning of a group into (double) cosets. In this article, we propose thre