β Scribed by Arthur W. Burks (auth.), Wolfgang HΓ€ndler, Dieter Haupt, Rolf Jeltsch, Wilfried Juling, Otto Lange (eds.)
No coin nor oath required. For personal study only.
A radically non-von-Neumann-architecture for learning and discovery....Pages 1-17
The parallel solution of sparse linear equations....Pages 18-24
Parallel algorithms on the cedar system....Pages 25-39
Future parallel computers....Pages 40-47
SUPRENUM β an MIMD multiprocessor system for multi-level scientific computing....Pages 48-52
An adaptable cluster structure of ( sm ) 2 -II....Pages 53-60
Memory conflicts in MIMD-computers β a performance analysis....Pages 61-68
The digital optical computing program at Erlangen....Pages 69-75
Hmesh: A vlsi architecture for parallel processing....Pages 76-83
FFT on a new parallel vector processor....Pages 84-94
Analysis of multigrid methods for non-shared memory systems by a simple performance model....Pages 95-103
Multitasking algorithms on CRAY computers for interval arithmetic Newton-like methods for a class of systems of nonlinear equations....Pages 104-111
Full recursive form of the algorithms for fast generalized fourier transforms....Pages 112-119
SISAL: Initial MIMD performance results....Pages 120-127
Caltech hypercube MIMD computer performances measurements in a physical mathematical application....Pages 128-132
A new approach to decentralized control of job scheduling....Pages 133-141
Synchronous communication of cooperating processes in the M 5 PS multiprocessor....Pages 142-148
Parallel implementation of the algebraic path problem....Pages 149-156
Implementing branch-and-bound in a ring of processors....Pages 157-164
Synthesis of systolic algorithms and processor arrays....Pages 165-172
Fraktale und ihre Untersuchung mit Parallelrechnung....Pages 173-182
A parallel processing algorithm for thinning digitised pictures....Pages 183-189
Fault-tolerant hardware configuration management on the multiprocessor system DIRMU 25....Pages 190-197
A general purpose pipelined ring architecture....Pages 198-205
An adaptive parallel algorithm for display of CSG objects....Pages 206-213
A packet based demand/data driven reduction model for the parallel execution of logic programs....Pages 214-221
Information processing with associative processors....Pages 222-229
A high performance interconnection concept for dataflow- or other closely coupled multiprocessors....Pages 230-238
Parallel solution of eigenvalue problems in acoustics on the Distributed Array Processor (DAP)....Pages 239-246
Gauss elimination algorithms for mimd computers....Pages 247-254
Fast parallel algorithms for eigenvalue and singular value computations....Pages 255-263
A new Parallel algorithm for solving general linear systems of equations....Pages 264-271
Generalized asynchronous iterations....Pages 272-278
Parallel compilation on a multiprocessor system....Pages 279-286
Semi-automatic parallelization of fortran programs....Pages 287-294
Code generation for partially vectorizable loops in the vectorizing Pascal-XT compiler....Pages 295-302
Automatic vectorisation for high level languages based on an expert system....Pages 303-310
Hierarchical array processor system (HAP)....Pages 311-318
Ocsamo a systolic array for matrix operations....Pages 319-328
A general approach to sorting on 3-dimensionally mesh-connected arrays....Pages 329-337
Complexity of parallel partitioned algorithms....Pages 338-344
Shuffle/exchange is the natural interconnection scheme for the parallel fast fourier transform....Pages 345-352
Kronecker products of matrices and their implementation on shuffle/exchange-type processor networks....Pages 353-360
Lisa: A parallel processing architecture....Pages 361-375
A classification of algorithms which are well suited for implementations on the DAP as a basis for further research on parallel programming....Pages 376-384
Use of inherent parallelism in database operations....Pages 385-392
Parallel dynamic programming algorithms....Pages 393-402
Multiprocessors: Main trends and dead ends....Pages 403-403
Toward the parallel inference machine....Pages 404-418
Processor Architectures; Arithmetic and Logic Structures
π SIMILAR VOLUMES
<p>This volume presents the proceedings of the joint meeting CONPAR 92 - VAPP V, held in Lyon, France, September 1992. The international Conferences on Parallel Processing (CONPAR) and the meetings on Vector and Parallel Processors in computational science (VAPP) have been held jointly since CONPAR
<p>This volume presents the proceedings of the Third Joint International Conference on Vector and Parallel Processing (CONPAR 94 - VAPP VI), held in Linz, Austria in September 1994. <BR>The 76 papers contained were carefully selected from a wealth of submissions and address the most important aspect
<p>This volume presents the proceedings of the Third Joint International Conference on Vector and Parallel Processing (CONPAR 94 - VAPP VI), held in Linz, Austria in September 1994. <BR>The 76 papers contained were carefully selected from a wealth of submissions and address the most important aspect
<p>Parallel architectures are no longer pure research vehicles, as they were some years ago. There are now many commercial systems competing for market segments in scientific computing. The 1990s are likely to become the decade of parallel processing. <B>CONPAR 90 - VAPP IV</B> is the joint successo
<p>Parallel architectures are no longer pure research vehicles, as they were some years ago. There are now many commercial systems competing for market segments in scientific computing. The 1990s are likely to become the decade of parallel processing. <B>CONPAR 90 - VAPP IV</B> is the joint successo