✦ LIBER ✦
Comparison of Dual-Rail and TMR Logic Cost Effectiveness and Suitability for FPGAs With Reconfigurable SEU Tolerance
✍ Scribed by Shuler, Robert L.; Bhuva, Bharat L.; O'Neill, Patrick M.; Gambles, Jody W.; Rezgui, Sana
- Book ID
- 118164186
- Publisher
- IEEE
- Year
- 2009
- Tongue
- English
- Weight
- 358 KB
- Volume
- 56
- Category
- Article
- ISSN
- 0018-9499
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