CMOS circuits for passive wireless microsystems
β Scribed by Yuan, Fei
- Publisher
- Springer
- Year
- 2010;2011
- Tongue
- English
- Leaves
- 294
- Category
- Library
No coin nor oath required. For personal study only.
β¦ Synopsis
This book provides a comprehensive treatment of CMOS circuits for passive wireless microsystems. Major topics include: an overview of passive wireless microsystems, design challenges of passive wireless microsystems, fundamental issues of ultra-low power wireless communications, radio-frequency power harvesting, ultra-low power modulators and demodulators, ultra-low power temperature-compensated current and voltage references, clock generation and remote calibration, and advanced design techniques for ultra low-power analog signal processing.
β¦ Table of Contents
7.1.1 Quantization Error......Page 3
6.3 Clock Generation Using Carrier Injection-Locking......Page 7
7.2.2 Dual-Slope Integrating ADCs......Page 11
7.3.1 Relaxation Oscillator-Based Temperature ADCs......Page 13
Cover......Page 1
References......Page 2
CMOS Circuits for PassiveWireless Microsystems......Page 4
7.1.4 Differential Nonlinearity......Page 5
7.1.6 Dynamic Range......Page 6
2.2.4 Modified Dickson Voltage Multipliers......Page 10
Acknowledgments......Page 12
Contents......Page 14
7.3.2 Ring Oscillator-Based Temperature ADCs......Page 15
Chapter 2 RADIO-FREQUENCY POWER HARVEST......Page 26
2.2.7 Bergeret Voltage Multiplier......Page 39
Preface......Page 8
7.2.1 Single-Slope Integrating ADCs......Page 9
Index......Page 18
1.2.8 Dimension of Antennas......Page 25
2.1.1 Power Matching......Page 27
5.4.2 Malcovati Voltage Reference......Page 34
2.2.5 Mandal-Sarpeshkar Voltage Multiplier......Page 36
2.2.6 Voltage Multiplier with VT -Cancellation......Page 37
4.3.3 Jung FSK Demodulator......Page 38
2.3 Power-Matching and Gain-Boosting Using LC Tanks......Page 40
5.5.1 Ytterdal Voltage Reference......Page 42
4.4.1 PSK Modulators......Page 43
5.5.2 Cheng-Wu Voltage Reference......Page 44
4.4.3 Non-Coherent BPSK Demodulators......Page 49
7.6.9 Multi-Stage Charge-Scaling DACs......Page 52
7.7 Performance Comparison......Page 53
5.2.4 Resistance of Diffusion and Poly Resistors......Page 16
5.2.5 PTAT Voltage / Current Generators......Page 17
7.4 Time-to-Digital Converter Based Temperature ADCs......Page 19
Chapter 1 PASSIVE WIRELESS MICROSYSTEMS......Page 20
1.2.2 Fluctuating Supply Voltage......Page 22
7.6.2 Accuracy of Charge-Scaling DACs......Page 28
2.2 Voltage Multipliers......Page 30
2.2.3 Dickson Voltage Multipliers......Page 32
7.6.4 Single-Stage Binary-Weighted Capacitor Arrays......Page 33
5.5 Sub-threshold Voltage References......Page 41
7.6.6 C-2C Capacitor Arrays......Page 45
5.5.4 Ueno Voltage Reference......Page 47
5.5.5 De Vita - Iannaccone Voltage Reference......Page 48
5.5.6 Sub-threshold Voltage References Without Amplifers......Page 50
5.6 Chapter Summary......Page 54
1.2.4 Precision Voltage References......Page 23
1.2.5 Ultra-Low Power Analog-to-Digital Converters......Page 24
2.2.4 Modified Dickson Voltage Multipliers......Page 35
2.4 Power-Matching and Gain-Boosting UsingTransformers......Page 51
7.8 Chapter Summary......Page 55
1.2 The Challenges......Page 21
2.1.2 Power Efficiency......Page 29
2.2.1 Voltage Doubler......Page 31
2.5 Chapter summary......Page 64
Chapter 3 DATA ENCODING......Page 67
3.1 Non-Return-to-Zero Encoding......Page 69
3.2 Return-to-Zero Encoding......Page 70
3.3 Manchester Encoding......Page 71
3.4 Miller Encoding......Page 72
3.5 Miller-Modulated Sub-carrier Encoding......Page 73
3.7 Pulse Interval Encoding......Page 74
3.8 Chapter Summary......Page 75
Chapter 4 MODULATORS AND DEMODULATORS......Page 78
4.1.1 Amplitude Shift Keying......Page 79
4.1.2 Frequency Shift Keying......Page 81
4.1.3 Phase Shift Keying......Page 83
4.2.2 Classif cation of ASK Demodulators......Page 84
4.2.3 Design Challenges of ASK Demodulators......Page 85
4.2.4 Voltage-Mode ASK Demodulators......Page 95
4.2.5 Current-Mode ASK Demodulators......Page 102
4.2.6 Mixed-Mode ASK Demodulators......Page 104
4.2.7 Performance Comparison of ASK Demodulators......Page 111
4.3.1 FSK Modulators......Page 113
4.3.2 Ghovanloo-Najaf FSK Demodulator......Page 114
4.3.3 Jung FSK Demodulator......Page 115
4.3.4 Weng FSK Demodulator......Page 117
4.3.5 Performance Comparison of FSK Demodulators......Page 119
4.4.1 PSK Modulators......Page 120
4.4.2 Coherent BPSK Demodulators......Page 121
4.4.3 Non-Coherent BPSK Demodulators......Page 126
4.4.4 Performance Comparison of PSK Demodulators......Page 129
4.5 Chapter Summary......Page 130
5.1 Characterization of Voltage References......Page 134
5.1.1 Temperature Coeff cient......Page 135
5.1.2 Power Supply Rejection Ratio......Page 136
5.2.1 Base-Emitter Voltage of BJTs......Page 137
5.2.2 Threshold Voltage of MOSFETs......Page 144
5.2.3 Gate-Source Voltage of MOSFETs in Weak Inversion......Page 145
5.2.4 Resistance of Diffusion and Poly Resistors......Page 149
5.2.5 PTAT Voltage / Current Generators......Page 150
5.2.6 Zero-Temperature-Coeff cient Bias Point......Page 152
5.3 First-Order Voltage References......Page 153
5.3.1 Widlar Voltage Reference......Page 155
5.3.2 Banba Voltage Reference......Page 158
5.3.3 Waltari-Halonen Voltage Reference......Page 159
5.3.4 Jiang-Lee Voltage Reference......Page 160
5.3.5 Threshold Voltage Based Voltage References......Page 161
5.3.6 Buck Voltage Reference......Page 163
5.3.7 Comparison of First-Order Voltage References......Page 165
5.4 High-Order Voltage References......Page 166
5.4.1 Piecewise-Linear Voltage Reference......Page 167
5.4.3 Resistor Curvature-CompensatedVoltage Reference......Page 170
5.4.4 Ker-Chen Voltage Reference......Page 172
5.4.5 Comparison of High-Order Voltage References......Page 174
5.5.1 Ytterdal Voltage Reference......Page 175
5.5.2 Cheng-Wu Voltage Reference......Page 177
5.5.3 Huang Voltage Reference......Page 178
5.5.4 Ueno Voltage Reference......Page 180
5.5.5 De Vita - Iannaccone Voltage Reference......Page 181
5.5.6 Sub-threshold Voltage References Without Amplifers......Page 183
5.5.7 Comparison of Sub-Threshold Voltage References......Page 186
5.6 Chapter Summary......Page 187
Chapter 6 CLOCK GENERATION AND CALIBRATION......Page 190
6.1 Clock Generation From Carrier......Page 191
6.2 Clock Generation From Envelope......Page 194
6.3 Clock Generation Using Carrier Injection-Locking......Page 196
6.4 Clock Generation Using Digital Trimming......Page 198
6.5 Clock Generation Using Phase-Locked Loops......Page 200
6.6 Clock Generation Using Frequency-Locked Loop......Page 202
6.7 Clock Generation Using Envelope Injection-Locking......Page 203
6.8 Performance Comparison......Page 215
Chapter 7 LOW-POWER ANALOG-TO-DIGITALCONVERTERS......Page 218
7.1 Fundamentals of Analog-to-Digital Converters......Page 219
7.1.1 Quantization Error......Page 220
7.1.2 Offset Error......Page 222
7.1.5 Integral Nonlinearity......Page 223
7.1.8 Signal-to-Noise-and-Distortion Ratio......Page 225
7.2.1 Single-Slope Integrating ADCs......Page 226
7.2.2 Dual-Slope Integrating ADCs......Page 228
7.3.1 Relaxation Oscillator-Based Temperature ADCs......Page 230
7.3.2 Ring Oscillator-Based Temperature ADCs......Page 232
7.4 Time-to-Digital Converter Based Temperature ADCs......Page 236
7.6 Charge Redistribution Successive ApproximationADCs......Page 240
7.6.1 Charge-Scaling DACs......Page 241
7.6.2 Accuracy of Charge-Scaling DACs......Page 245
7.6.3 Charge Redistribution ADCs......Page 247
7.6.4 Single-Stage Binary-Weighted Capacitor Arrays......Page 250
7.6.5 Two-Stage Binary-Weighted Capacitor Array......Page 252
7.6.6 C-2C Capacitor Arrays......Page 262
7.6.7 Switching Network......Page 268
7.6.9 Multi-Stage Charge-Scaling DACs......Page 269
7.7 Performance Comparison......Page 270
7.8 Chapter Summary......Page 272
Appendix AMaterial and Physical Constants......Page 273
References......Page 274
Index......Page 290
About the Author......Page 294
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