Closing the Gap Between ASIC & Custom: Tools and Techniques for High-Performance ASIC Design

✍ Scribed by David Chinnery, Kurt Keutzer (auth.)

• Publisher: Springer US
• Year: 2004
• Tongue: English
• Leaves: 390
• Edition: 1
• Category: Library

✦ Synopsis

by Kurt Keutzer Those looking for a quick overview of the book should fast-forward to the Introduction in Chapter 1. What follows is a personal account of the creation of this book. The challenge from Earl Killian, formerly an architect of the MIPS processors and at that time Chief Architect at Tensilica, was to explain the significant performance gap between ASICs and custom circuits designed in the same process generation. The relevance of the challenge was amplified shortly thereafter by Andy Bechtolsheim, founder of Sun Microsystems and ubiquitous investor in the EDA industry. At a dinner talk at the 1999 International Symposium on Physical Design, Andy stated that the greatest near-term opportunity in CAD was to develop tools to bring the performance of ASIC circuits closer to that of custom designs. There seemed to be some synchronicity that two individuals so different in concern and character would be pre-occupied with the same problem. Intrigued by Earl and Andy’s comments, the game was afoot. Earl Killian and other veterans of microprocessor design were helpful with clues as to the sources of the performance discrepancy: layout, circuit design, clocking methodology, and dynamic logic. I soon realized that I needed help in tracking down clues. Only at a wonderful institution like the University of California at Berkeley could I so easily commandeer an ab- bodied graduate student like David Chinnery with a knowledge of architecture, circuits, computer-aided design and algorithms.

✦ Table of Contents

Introduction and Overview of the Book....Pages 1-31
Improving Performance through Microarchitecture....Pages 33-56
Reducing the Timing Overhead....Pages 57-100
High-Speed Logic, Circuits, Libraries and Layout....Pages 101-144
Finding Peak Performance in a Process....Pages 145-168
Physical Prototyping Plans for High Performance....Pages 169-186
Automatic Replacement of Flip-Flops by Latches in ASICs....Pages 187-208
Useful-Skew Clock Synthesis Boosts ASIC Performance....Pages 209-223
Faster and Lower Power Cell-Based Designs with Transistor-Level Cell Sizing....Pages 225-240
Design Optimization with Automated Flex-Cell Creation....Pages 241-267
Exploiting Structure and Managing Wires to Increase Density and Performance....Pages 269-287
Semi-Custom Methods in a High-Performance Microprocessor Design....Pages 289-303
Controlling Uncertainty in High Frequency Designs....Pages 305-322
Increasing Circuit Performance through Statistical Design Techniques....Pages 323-344
Achieving 550MHz in a Standard Cell ASIC Methodology....Pages 345-360
The iCORE™ 520MHz Synthesizable CPU Core....Pages 361-381
Creating Synthesizable ARM Processors with Near Custom Performance....Pages 383-408

✦ Subjects

Circuits and Systems; Electronic and Computer Engineering; Computer-Aided Engineering (CAD, CAE) and Design