✦ LIBER ✦

Bit Cell Optimizations and Circuit Techniques for Nanoscale SRAM Design

✍ Scribed by Hamzaoglu, F.; Yih Wang; Kolar, P.; Liqiong Wei; Yong-Gee Ng; Bhattacharya, U.; Zhang, K.

Book ID: 114579915
Publisher: IEEE
Year: 2011
Tongue: English
Weight: 298 KB
Volume: 28
Category: Article
ISSN: 0740-7475
DOI: 10.1109/mdt.2011.5

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Device-Optimization Technique for Robust

Device-Optimization Technique for Robust and Low-Power FinFET SRAM Design in NanoScale Era

✍ Bansal, A.; Mukhopadhyay, S.; Roy, K. 📂 Article 📅 2007 🏛 IEEE 🌐 English ⚖ 897 KB

[IEEE 2008 International SoC Design Conf

[IEEE 2008 International SoC Design Conference (ISOCC) - Busan, Korea (South) (2008.11.24-2008.11.25)] 2008 International SoC Design Conference - Stability enhancement techniques for nanoscale SRAM circuits: A comparison

✍ Tawfik, Sherif A.; Kursun, Volkan 📂 Article 📅 2008 🏛 IEEE ⚖ 252 KB

An experimental technique for the design

An experimental technique for the design of optimized resonant-cap circuits for microwave IMPATT oscillators and amplifiers

✍ Subal Kar 📂 Article 📅 1998 🏛 John Wiley and Sons 🌐 English ⚖ 249 KB 👁 2 views

The design of optimized resonant-cap circuits for IMPATT ( ) oscillators and amplifiers at X-band 8᎐12 GHz based on experimental results has been reported in this paper. The microwa¨e power output ( ) ( ) f 1 W of the oscillator and the gain f 20 dB of the amplifier realized with the IMPATT de¨ice m

[IEEE Asia and South Pacific Conference

[IEEE Asia and South Pacific Conference on Design Automation, 2006. - Yokohama, Japan (Jan. 24, 2006)] Asia and South Pacific Conference on Design Automation, 2006. - Electrothermal analysis and optimization techniques for nanoscale integrated circuits

✍ Yong Zhan, ; Goplen, B.; Sapatnekar, S.S. 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 236 KB

[IEEE 2010 10th IEEE International Confe

[IEEE 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT) - Shanghai, China (2010.11.1-2010.11.4)] 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology - CRC circuit design for SRAM-Based FPGA configuration bit correction

✍ Yang, Wenlong; Lingli Wang, ; Zhou, Xuegong 📂 Article 📅 2010 🏛 IEEE ⚖ 442 KB

[IEEE IEEE 2005 Custom Integrated Circui

[IEEE IEEE 2005 Custom Integrated Circuits Conference, 2005. - San Jose, CA, USA (Sept. 18-21, 2005)] Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005. - Modeling and optimization approach to robust and low-power FinFET SRAM design in nanoscale era

✍ Bansal, A.; Mukhopadhyay, S.; Roy, K. 📂 Article 📅 2005 🏛 IEEE 🌐 English ⚖ 236 KB