Let V be a set of u elements. A (1,2; 3,v, I)-frame F is a square array of side v which satisfies the following properties. We index the rows and columns of F with the elements of V, V= {x Ir x2,, ,x,}. (1) Each cell is either empty or contains a 3-subset of V. (2) Cell (xi. xi) is empty for i= 1,2
Balanced tournament designs and resolvable (υ, 3, 2)-bibds
✍ Scribed by E.R. Lamken; S.A. Vanstone
- Publisher
- Elsevier Science
- Year
- 1990
- Tongue
- English
- Weight
- 721 KB
- Volume
- 83
- Category
- Article
- ISSN
- 0012-365X
No coin nor oath required. For personal study only.
✦ Synopsis
In this paper, we present new constructions for resolvable and near resolvable (v, 3, 2)-BIBDs. These constructions use balanced tournament designs and odd balanced tournament designs. We then use balanced tournament designs with almost orthogonal resolutions and odd balanced tournament designs with orthogonal resolutions to generalize these constructions and produce doubly resolvable and doubly near resolvable (v, 3, 2)-BIBDs.
📜 SIMILAR VOLUMES
## Abstract The necessary conditions for the existence of a super‐simple resolvable balanced incomplete block design on __v__ points with __k__ = 4 and λ = 3, are that __v__ ≥ 8 and __v__ ≡ 0 mod 4. These conditions are shown to be sufficient except for __v__ = 12. © 2003 Wiley Periodicals, Inc.
## Abstract The necessary conditions for the existence of a super‐simple resolvable balanced incomplete block design on __v__ points with block size __k__ = 4 and index λ = 2, are that __v__ ≥ 16 and $v \equiv 4\; (\bmod\; {12})$. These conditions are shown to be sufficient. © 2006 Wiley Periodical
## Abstract Splitting balanced incomplete block designs were first formulated by Ogata, Kurosawa, Stinson, and Saido recently in the investigation of authentication codes. This article investigates the existence of splitting balanced incomplete block designs, i.e., (__v__, 3__k__, λ)‐splitting BIBD
## Abstract A backtracking over parallel classes with a partial isomorph rejection (PIR) is carried out to enumerate the resolvable 2‐(10,5,16) designs. Computational results show that the inclusion of PIR reduce substantially the CPU time for the enumeration of all designs. We prove first some res