<p><p>This book presents an innovative methodology for the automatic generation of analog integrated circuits (ICs) layout, based on template descriptions and on evolutionary computational techniques. A design automation tool, LAYGEN II was implemented to validate the proposed approach giving specia
Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
✍ Scribed by Nuno Lourenço, Ricardo Martins, Nuno Horta (auth.)
- Publisher
- Springer International Publishing
- Year
- 2017
- Tongue
- English
- Leaves
- 199
- Edition
- 1
- Category
- Library
No coin nor oath required. For personal study only.
✦ Synopsis
This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit’s performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches.
The authors describe a methodology for an automatic flow for analog IC design, including details of the inputs and interfaces, multi-objective optimization techniques, and the enhancements made in the base implementation by using machine leaning techniques. The Gradient model is discussed in detail, along with the methods to include layout effects in the circuit sizing. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. An extensive set of application examples is included to demonstrate the capabilities and features of the methodologies described.
✦ Table of Contents
Front Matter....Pages i-xxvii
Introduction....Pages 1-11
Previous Works on Automatic Analog IC Sizing....Pages 13-37
AIDA-C Architecture....Pages 39-61
Multi-objective Optimization Kernel....Pages 63-86
AIDA-C Circuit Sizing Results....Pages 87-119
Layout-Aware Circuit Sizing....Pages 121-146
AIDA-C Layout-Aware Circuit Sizing Results....Pages 147-175
Conclusions....Pages 177-179
Back Matter....Pages 181-182
✦ Subjects
Circuits and Systems;Processor Architectures;Electronics and Microelectronics, Instrumentation
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