Authentication of Embedded Devices: Technologies, Protocols and Emerging Applications

✍ Scribed by Basel Halak (editor)

• Publisher: Springer
• Tongue: English
• Leaves: 192
• Category: Library

✦ Synopsis

This book provides comprehensive coverage of state-of-the-art integrated circuit authentication techniques, including technologies, protocols and emerging applications.

The authors first discuss emerging solutions for embedding unforgeable identifies into electronics devices, using techniques such as IC fingerprinting, physically unclonable functions and voltage-over-scaling. Coverage then turns to authentications protocols, with a special focus on resource-constrained devices, first giving an overview of the limitation of existing solutions and then presenting a number of new protocols, which provide better physical security and lower energy dissipation. The third part of the book focuses on emerging security applications for authentication schemes, including securing hardware supply chains, hardware-based device attestation and GPS spoofing attack detection and survival.

• Provides deep insight into the security threats undermining existing integrated circuit authentication techniques;
• Includes an in-depth discussion of the emerging technologies used to embed unforgeable identifies into electronics systems;
• Offers a comprehensive summary of existing authentication protocols and their limitations;
• Describes state-of-the-art authentication protocols that provide better physical security and more efficient energy consumption;
• Includes detailed case studies on the emerging applications of IC authentication schemes.

✦ Table of Contents

Preface
The Contents at Glance
Book Audience
Acknowledgments
Contents
About the Editor
Part I Fingerprinting Technologies
1 Integrated Circuit Digital Fingerprinting–Based Authentication
1.1 Introduction
1.2 Chapter Overview
1.3 Hardware-Based Lightweight Authentication
1.3.1 The Need of Authentication in Embedded Devices
1.3.2 Classical Authentication Protocols
1.3.3 Hardware-Based Lightweight Authentication
1.4 Principles of Digital Fingerprinting–Based Device Authentication
1.4.1 IC Digital Fingerprints
1.4.2 Requirements for Hardware-Based Device Authentication
1.4.3 Two-Phase Hardware-Based Device Authentication
1.5 Practices in Integrated Circuit Fingerprinting
1.5.1 Fingerprinting by Constraint Addition
1.5.2 Fingerprinting by Iterative Refinement
1.5.3 Post-Silicon Fingerprinting on Don't-Care Conditions
1.5.3.1 Observability Don't Care–Based Fingerprinting
1.5.3.2 Satisfiability Don't Care–Based Fingerprinting
1.5.4 Scan Chain–Based Fingerprinting
1.6 A Reconfigurable Scan Network–Based Circuit Fingerprint for Device Authentication
1.6.1 Reconfigurable Scan Networks
1.6.2 Segment Insertion Bit–Based RSNs
1.6.3 RSN-Based IC Fingerprinting
1.6.4 Security Analysis
1.6.5 Experimental Results
1.7 Summary
References
2 Physical Unclonable Function: A Hardware FingerprintingSolution
2.1 Introduction
2.2 Chapter Overview
2.3 Physical Unclonable Function
2.3.1 PUF Concept and Properties
2.3.2 Process Variability in Integrated Circuits
2.3.3 Chronology of Silicon Based PUFs
2.4 PUF Constructions
2.4.1 Delay, Mixed-Signal, and Memory PUFs
2.4.2 FinFET Based PUFs
2.4.3 Nanotechnology PUFs
2.4.4 PUF Evaluation Metrics
2.4.4.1 Uniqueness
2.4.4.2 Reliability
2.4.4.3 Uniformity
2.5 PUFs Applications
2.5.1 IC Identification and Authentication
2.5.2 Cryptographic Key Generation
2.6 Conclusion
References
Part II Authentication Protocols
3 ASSURE: A Hardware-Based Security Protocol for Internet of Things Devices
3.1 Introduction
3.2 Chapter Overview
3.3 Related Background
3.3.1 Physically Unclonable Functions
3.3.2 Principles Datagram Transport Layer Security
3.3.2.1 Definition
3.3.2.2 DTLS Protocols
3.3.3 RC5 Algorithm for Resource-Limited Environments
3.3.3.1 RC5 Notation
3.3.3.2 Encryption Process
3.3.3.3 Decryption Process
3.3.3.4 Key Expansion in RC5 Algorithm
3.4 ASSURE – Protocol Description
3.4.1 Specifications
3.4.2 Operation Principles
3.5 Security Analysis
3.5.1 System Model
3.5.2 Attacker Model
3.5.3 Security Properties
3.5.4 Scyther Tool
3.5.5 Motivation for Using Scyther
3.5.6 Defining the Proposed Protocol in Scyther
3.5.7 Proof of Security Properties
3.5.8 Model-Building Resistance
3.5.8.1 Test Vector Generation and Machine Learning
3.5.8.2 Model-Building Attack Results
3.6 Experimental Analysis Method
3.6.1 The Purpose of the Experiment
3.6.2 Experimental Set-up
3.6.3 Building a PUF Model
3.6.4 Functional Verification
3.6.5 Metrics of Evaluation
3.7 Evaluation and Cost Analysis
3.7.1 Estimation of Memory Usage
3.7.2 Discussion of Memory Utilisation Results
3.7.3 Estimation of Completion Time
3.7.4 Estimation of Energy Consumption
3.8 Conclusion
A. Appendix A
References
4 TIGHTEN: A Two-Flight Mutual Authentication Protocol for Energy-Constrained Devices
4.1 Introduction
4.2 Chapter Overview
4.3 A Primer on Elliptic Curve Cryptography (ECC)
4.3.1 Definition
4.3.2 Elliptic-Curve-Based Group Operations
4.3.2.1 Point Addition
4.3.2.2 Point Doubling
4.3.2.3 Scalar Point Multiplication
4.3.2.4 Elliptic Curve Discrete Logarithm Problem
4.3.2.5 Elliptic Curve–Based Diffie-Hellman Scheme
4.3.2.6 Elliptic Curve-Based Digital Signature Algorithm
4.4 TIGHTEN Protocol Description
4.4.1 Registration Stage
4.4.2 Verification Stage
4.5 Security Analysis
4.5.1 System Model
4.5.2 Attacker Model
4.5.3 Security Properties
4.5.4 Defining the Proposed Protocol in Scyther
4.5.5 Proof of Security Properties Using Scyther
4.6 Experimental Analysis Method
4.6.1 The Purpose of the Experiment
4.6.2 Experimental Set-up
4.6.3 Metrics of Evaluation
4.7 Evaluation and Cost Analysis
4.7.1 Estimation of Memory Usage
4.7.2 Estimation of Completion Time
4.7.3 Estimation of Energy Consumption
4.7.4 Comparison with Other Protocols
4.8 Conclusion
References
Part III Emerging Applications of Hardware-based Authentication
5 Securing Hardware Supply Chain Using PUF
5.1 Introduction
5.2 Chapter Overview
5.3 Related Work
5.4 Blockchain and Smart Contract
5.5 System Model
5.5.1 Supply Chain Model
5.5.2 PUF-Equipped Item Model
5.5.3 Blockchain Model
5.5.4 Smart Contract Execution Environment Model
5.5.5 Threat Model
5.6 Tracking System
5.6.1 Event 1: New Item
5.6.2 Event 2: Item Shipping
5.6.3 Event 3: Item Delivery and Verification
5.6.3.1 Item Delivery
5.6.3.2 Challenge-Response Batch Release
5.6.3.3 Item Verification
5.7 Security Analysis
5.7.1 Attacks Definition
5.7.2 Attacks Analysis
5.8 Experimental Evaluation
5.8.1 PUF Tuning
5.8.2 Prototype Test
5.9 Discussion
5.9.1 Security Analysis Results
5.9.2 PKI Infrastructure for Consortium Blockchains
5.9.3 Threat Model Limitations
5.9.4 Embedding PUFs Within Items to Track
5.9.5 Privacy Issues
5.9.6 Performance and Scalability
5.9.7 Platform Integration Costs
5.10 Conclusion
References
6 Hardware-Based Authentication Applications
6.1 Introduction
6.2 Organization
6.2.1 Notations
6.3 Background
6.3.1 Fundamentals on Authentication
6.3.2 Hardware in Authentication
6.4 Hardware-Based Authentication Using Approximation Errors
6.4.1 Errors in an Approximated Circuit
6.4.2 Error Modeling
6.4.3 Assumptions
6.4.4 Authentication Protocol Using Approximation Errors
6.4.5 Evaluation of the Protocol
6.5 Authentication Using Memory Components
6.5.1 Requirements and Utility Functions
6.5.2 An Example of Single Entity Authentication: Protocol I
6.5.3 Security Analysis of Protocol I
6.5.4 Multiple User Authentication
6.5.5 Security Analysis of Multi-User Authentication Protocol
6.6 Authentication and Spoofing Detection Using Hardware Clocks
6.6.1 The GPS System
6.6.2 Hardware-Based Signal Authentication and Spoofing Detection
6.6.3 Hardware Clocks
6.6.4 State Space Model of Hardware Clocks
6.6.5 Kalman Filter Design for Authentication and Spoofing Detection
6.6.6 Signal Authentication and Anomaly Detection
6.6.7 Spoofing Detection and Results
6.6.8 Analysis of Hardware Dependent Signal Authentication
6.7 Conclusions
References
Index