Assembly Language Programming: ARM Cortex-M3

✍ Scribed by Vincent Mahout

• Publisher: Wiley-ISTE
• Year: 2012
• Tongue: English
• Leaves: 258
• Edition: 1
• Category: Library

✦ Synopsis

ARM designs the cores of microcontrollers which equip most "embedded systems" based on 32-bit processors. Cortex M3 is one of these designs, recently developed by ARM with microcontroller applications in mind. To conceive a particularly optimized piece of software (as is often the case in the world of embedded systems) it is often necessary to know how to program in an assembly language.

This book explains the basics of programming in an assembly language, while being based on the architecture of Cortex M3 in detail and developing many examples.

It is written for people who have never programmed in an assembly language and is thus didactic and progresses step by step by defining the concepts necessary to acquiring a good understanding of these techniques.

✦ Table of Contents

Cover
Assembly Language Programming
Title Page
Copyright Page
Table of Contents
Preface
Chapter 1. Overview of Cortex-M3 Architecture
1.1. Assembly language versus the assembler
1.2. The world of ARM
1.2.1. Cortex-M3
1.2.2. The Cortex-M3 core in STM32
Chapter 2. The Core of Cortex-M3
2.1. Modes, privileges and states
2.2. Registers
2.2.1. Registers R0 to R12
2.2.2. The R13 register, also known as SP
2.2.3. The R14 register, also known as LR
2.2.4. The R15 or PC register
2.2.5. The xPSR register
Chapter 3. The Proper Use of Assembly Directives
3.1. The concept of the directive
3.1.1. Typographic conventions and use of symbols
3.2. Structure of a program
3.2.1. The AREA sections
3.3. A section of code
3.3.1. Labels
3.3.2. Mnemonic
3.3.3. Operands
3.3.4. Comments
3.3.5. Procedure
3.4. The data section
3.4.1. Simple reservation
3.4.2. Reservation with initialization
3.4.3. Data initialization: the devil is in the details
3.5. Is that all?
3.5.1. Memory management directives
3.5.2. Project management directives
3.5.3. Various and varied directives
Chapter 4. Operands of Instructions
4.1. The constant and renaming
4.2. Operands for common instructions
4.2.1. Use of registers
4.2.2. The immediate operand
4.3. Memory access operands: addressing modes
4.3.1. The pointer concept
4.3.2. Addressing modes
Chapter 5. Instruction Set
5.1. Reading guide
5.1.1. List of possible “condition” suffixes
5.2. Arithmetic instructions
5.3. Logical and bit manipulation instructions
5.4. Internal transfer instructions
5.5. Test instructions
5.6. Branch instructions
5.7. Load/store instructions
5.7.1. Simple transfers
5.7.2. Multiple transfers
5.7.3. Access to the system stack
5.8. “System” instructions and others
Chapter 6. Algorithmic and Data Structures
6.1. Flowchart versus algorithm
6.2. Alternative structures
6.2.1. Simple (or shortened) alternative
6.2.2. Complete alternative
6.2.3. Special case of the alternative
6.2.4. Multiple choice
6.3. Iterative structures
6.3.1. The Repeat…Until loop
6.3.2. The While…Do loop
6.3.3. The For… loop
6.4. Compound conditions
6.4.1. Alternative with AND
6.4.2. Iteration with AND
6.4.3. Alternative with OR
6.4.4. Iteration with OR
6.5. Data structure
6.5.1. Table in one dimension
6.5.2. Tables in multiple dimensions
6.5.3. Registration
6.5.4. Non-dimensional table, character string
6.5.5. Queue
6.5.6. Stack
Chapter 7. Internal Modularity
7.1. Detailing the concept of procedure
7.1.1. Simple call
7.1.2. Nested calls
7.1.3. “Red wire” example
7.2. Procedure arguments
7.2.1. Usefulness of arguments
7.2.2. Arguments by value and by reference
7.2.3. Passing arguments by general registers
7.2.4. Passing arguments by a stack
7.2.5. Passing arguments by the system stack
7.2.6. On the art of mixing
7.3. Local data
7.3.1. Simple reservation of local data
7.3.2. Using a chained list
Chapter 8. Managing Exceptions
8.1. What happens during Reset?
8.2. Possible exceptions
8.2.1. Traps
8.2.2. Interrupts
8.3. Priority management
8.3.1. Priority levels and sublevels
8.3.2. The nested mechanism
8.4. Entry and return in exception processing
8.4.1. Re-routing
8.4.2. Return
8.4.3. “Tail-chaining” and “Late-arriving”
8.4.4. Other useful registers for the NVIC
Chapter 9. From Listing to Executable: External Modularity
9.1. External modularity
9.1.1. Generic example
9.1.2. Assembly by pieces
9.1.3. Advantages of assembly by pieces
9.1.4. External symbols
9.1.5. IMPORT and EXPORT directives
9.2. The role of the assembler
9.2.1. Files produced by the assembler
9.2.2. Placement counters
9.2.3. First pass: symbol table
9.2.4. Second pass: translation
9.2.5. Relocation table
9.3. The role of the linker
9.3.1. Functioning principle
9.3.2. The products of the linker
9.4. The loader and the debugging unit
Appendices
Appendix A. Instruction Set – Alphabetical List
Appendix B. The SysTick Timer
Appendix C. Example of a “Bootstrap” File
Appendix D. The GNU Assembler
Bibliography
Index