ASIC/SoC Functional Design Verification : A Comprehensive Guide to Technologies and Methodologies

✍ Scribed by Mehta, Ashok B

Tongue: English
Leaves: 346
Category: Library

No coin nor oath required. For personal study only.

✦ Table of Contents

Front Matter....Pages i-xxxi
Introduction....Pages 1-4
Functional Verification: Challenges and Solutions....Pages 5-12
SystemVerilog Paradigm....Pages 13-15
UVM (Universal Verification Methodology)....Pages 17-64
Constrained Random Verification (CRV)....Pages 65-74
SystemVerilog Assertions (SVA)....Pages 75-128
SystemVerilog Functional Coverage (SFC)....Pages 129-148
Clock Domain Crossing (CDC) Verification....Pages 149-166
Low-Power Verification....Pages 167-191
Static Verification (Formal-Based Technologies)....Pages 193-220
ESL (Electronic System Level) Verification Methodology....Pages 221-241
Hardware/Software Co-verification....Pages 243-253
Analog/Mixed Signal (AMS) Verification....Pages 255-271
SoC Interconnect Verification....Pages 273-284
The Complete Product Design Life Cycle....Pages 285-300
Voice Over IP (VoIP) Network SoC Verification....Pages 301-309
Cache Memory Subsystem Verification: UVM Agent Based....Pages 311-318
Cache Memory Subsystem Verification: ISS Based....Pages 319-321
Back Matter....Pages 323-328

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