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Area/performance trade-off analysis of an FPGA digit-serial Montgomery multiplier based on LFSR

✍ Scribed by Morales-Sandoval, M.; Feregrino-Uribe, C.; Kitsos, P.; Cumplido, R.


Book ID
120467794
Publisher
Elsevier Science
Year
2013
Tongue
English
Weight
824 KB
Volume
39
Category
Article
ISSN
0045-7906

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