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Architectural tradeoffs for survivor sequence memory management in Viterbi decoders

✍ Scribed by Feygin, G.; Gulak, P.

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Low-power register-exchange survivor mem

✍ Shieh, M.-D.; Wang, T.-P.; Yang, D.-W. 📂 Article 📅 2009 🏛 The Institution of Engineering and Technology 🌐 English ⚖ 624 KB