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Analysis of Parasitic PNP Bipolar Transistor Mitigation Using Well Contacts in 130 nm and 90 nm CMOS Technology

✍ Scribed by Olson, Brian D.; Amusan, Oluwole A.; Dasgupta, Sandeepan; Massengill, Lloyd W.; Witulski, Arthur. F.; Bhuva, Bharat L.; Alles, Michael L.; Warren, Kevin M.; Ball, Dennis R.

Book ID: 121280251
Publisher: IEEE
Year: 2007
Tongue: English
Weight: 245 KB
Volume: 54
Category: Article
ISSN: 0018-9499
DOI: 10.1109/TNS.2007.895243

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