Analog circuit design: robust design, sigma delta converters, RFID

✍ Scribed by Roermund, Arthur H. M. van; Casier, Herman; Steyaert, Michiel

• Publisher: Springer
• Year: 2011
• Tongue: English
• Leaves: 369
• Category: Library

✦ Synopsis

Analog Circuit Design contains the contribution of 18 tutorials of the 19th workshop on Advances in Analog Circuit Design. Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art information is shared and overviewed. This book is number 20 in this successful series of Analog Circuit Design, providing valuable information and excellent overviews of: Robust Design, chaired byHerman Casier, Consultant Sigma Delta Converters, chaired by Prof. Michiel Steyaert, Catholic University Leuven RFID, chaired byProf. Arthur van Roermund, Eindhoven University of Technology Analog Circuit Design is an essential reference source for analog circuit designers and researchers wishing to keep abreast with the latest development in the field. The tutorial coverage also makes it suitable for use in an advanced design course.;pt. 1. Robust design -- pt. 2. Sigma delta converters -- pt. 3. RFID.

✦ Table of Contents

2.2 The RFID Measurement Setup......Page 4
4.1 Roadmap for Organic Electronics......Page 7
4.2 Roadmap for Printed RFID......Page 9
Cover......Page 1
2.1 Technology......Page 2
2.1 General Rectifier Topologies......Page 3
Preface......Page 5
Contributors......Page 10
3.1 Organic RFID Transponder Chip with Dual-Gate Architecture......Page 13
5 A 50 kHz RFID Transponder Chip......Page 15
1 Introduction......Page 16
2.4 Organic Rectifier......Page 6
Contents......Page 8
Part I......Page 14
4.3 First RFID Products......Page 11
References......Page 12
2.1 Variability and Mismatch......Page 17
2.2 Time-Dependent Degradation......Page 18
3.1 Illustrative Circuit Example......Page 22
3 Reliability Analysis of Analog Integrated Circuits......Page 20
2.2.1 Time-Dependent Dielectric Breakdown......Page 19
References......Page 23
5 Flexible Organic Semiconductor RFID Tags......Page 21
5 Conclusions......Page 28
1 Introduction......Page 317
1 Introduction......Page 349
4.1 Solutions to Processing Variability......Page 24
4.2 Solutions to Time-Dependent Degradation......Page 25
Modeling and Simulation of Statistical Variability in Nanometer CMOS Technologies......Page 30
2 Sources of Statistical Variability......Page 31
3 Statistical Variability in Advanced CMOS Devices......Page 32
4 Statistical Compact Model Strategy......Page 39
5 Impact of Statistical Variability on SRAM......Page 42
6 Conclusions......Page 44
References......Page 45
Advanced Physical Design in Nanoscale Analog CMOS......Page 47
2 Pre-Layout Simulation......Page 48
3 Post-Layout Simulation......Page 49
4 Process Variability......Page 50
5.1 Quantum-Effect Mismatch Errors......Page 51
5.4 Strategy for Matching as Devices are Downscaled......Page 52
6.1 Restricting the Number of Gate Fingers (F)......Page 54
6.2 Device Optimum Current Density Ids/(W/L) Under Scaling......Page 55
6.4 Achieving Good Pattern Fidelity in Device Design......Page 56
7 Mitigating Long-Distance Mismatch Errors in Precision Circuits......Page 59
8.1 Clock and Shielded Analog Signal Distribution Physical Design......Page 60
8.2 Dense Metal Interconnect Physical Design......Page 61
9 Summary and Conclusions......Page 62
Robust Design for High Temperature and High Voltage Applications......Page 64
2 Nanoelectronics Semiconductor Technologies for Power Devices for EVs and HEVs Applications......Page 68
3.1 Safe Operating Area......Page 73
4.1 Electro-Thermal Simulation......Page 74
5 Packaging and Interconnects......Page 75
5.2 Thermal Management......Page 76
6 Conclusions......Page 77
References......Page 78
Radiation Effects and Hardening by Design in CMOS Technologies......Page 79
2.1 TID Effects......Page 80
2.2 Single Event Effects (SEEs)......Page 84
3.1 HBD for TID Effects......Page 86
3.2 HBD for Single Event Effects......Page 91
4 Conclusion......Page 95
References......Page 96
EMC Robust Design for Smart Power High Side Switches......Page 98
2 High Side Switches in Smart Power Technology......Page 99
3 DPI Test for High Side Switches—Measurement Method......Page 100
3.3 Operation Modes of the IC Under Test......Page 102
5 DPI Robustness in Off State—Problem Description......Page 104
6 Design Methodology—Pin Impedance Design......Page 105
7 Measurement Results......Page 110
8 Conclusion......Page 112
References......Page 113
Part II......Page 114
Noise-Coupled Delta-Sigma ADCS......Page 116
2.1 Quantization noise self coupling (QNSC)......Page 117
2.2 Quantization noise cross-coupling and time-interleaving (NCTI)......Page 123
3 SC circuit implementation......Page 129
4.1 QNSC prototype ∆Σ ADC......Page 133
4.2 NCTI prototype ∆Σ ADCs......Page 137
Very Low OSR Sigma-Delta Converters......Page 143
2.1 Delta-Sigma Modulators......Page 144
2.2 Incremental Data Converters......Page 146
3 High-Order MASH ΣΔ Modulator......Page 148
3.1 Comparison with a Nyquist-Rate A/D Converter......Page 149
3.2 Single-Stage vs. Cascaded ΣΔ......Page 150
3.3 Sample Architecture......Page 151
3.4 Power Efficiency......Page 153
4.1 Comparison of Incremental and ΣΔ Converters......Page 156
4.2 Pipeline Equivalency......Page 158
4.3 Removing the Input S/H......Page 160
4.4 Sample Architecture......Page 162
Comparator-Based Switched-Capacitor Delta-Sigma A/D Converters......Page 165
2 Switched-Capacitor Integrator......Page 166
3.1 Comparator Delay......Page 170
3.2 Comparator Offset......Page 171
3.3 Comparator Noise......Page 172
3.4 Zero-Crossing Based Implementation......Page 173
4.2 Current Source Output Resistance......Page 174
4.4 High Output Swing Implementation......Page 175
5 CBSC Noise-Shaping Filter......Page 176
6 A CBSC Delta-Sigma A/D Converter in 90 nm CMOS......Page 178
7 Conclusions......Page 183
VCO-Based Wideband Continuous-Time Sigma-Delta Analog-to-Digital Converters......Page 185
2 Background on VCO-Based Quantization......Page 186
3 A First Pass at Utilizing VCO-Based Quantization Within Continuous-Time Sigma-Delta ADC Structures......Page 191
4 Overcoming the Issue of Nonlinearity in the VCO-Based Quantizer......Page 193
5 Striving for 80 dB SNDR with 20 MHz Bandwidth......Page 195
6.1 VCO-Based Quantizer......Page 199
6.3 DAC Designs......Page 201
6.4 DEM Design......Page 203
6.5 Overall Implementation in 0.13 µ CMOS......Page 204
8 Conclusions......Page 207
Wideband Continuous-Time Multi-Bit Delta-Sigma ADCs......Page 210
2 A 20 MHz 68 dB Dynamic Range ∆Σ ADC Based on Time-Domain Quantizer and Feedback Element......Page 211
2.1 Multi-Bit Time-Based ADC Architecture [12, 13]......Page 212
2.3 Time-Domain Quantizer......Page 214
2.4 Spectrum of the PWM Signal DAC......Page 215
2.5 Design Considerations......Page 216
2.6 Experimental Results......Page 219
3.2.1 Jitter Sensitivity......Page 220
3.2.2 Static Device Mismatch......Page 222
3.3 Filter and Summing Amplifier......Page 224
3.4 Three-Bit Two-Step Quantizer......Page 225
3.5 Level-to-PWM Converter......Page 227
3.6 Clock Generator......Page 229
3.7 Simulated and Experimental Results......Page 230
References......Page 232
OVERSAMPLED DACs......Page 234
2.1 In-band Dynamic Range (DR)......Page 236
2.3 Single-Ended Output......Page 238
2.7 Out-of-band SNRout......Page 240
2.8 Output Power Stage......Page 241
4.1 Single-Bit vs. Multibit......Page 242
4.2 Switched-Capacitor D/A Interface......Page 243
4.3 Switched-Current......Page 245
5.1 Increasing the Quantizer Output Number of Bit......Page 249
5.3 Improving PSRR......Page 252
5.5 Improved Σ∆M for Idle-Tone Reduction......Page 255
5.6 Hybrid DAC......Page 256
6 High-Speed Oversampled DAC......Page 261
Part III......Page 263
1 RFID History......Page 265
2 RFID Market Landscape......Page 267
3.1 The Core Architecture......Page 268
3.3 RFID Standards and Applications Before the Epoch......Page 270
3.4 Bar Code Applications and Application Standards Before the Epoch......Page 271
3.5 Early RFID Standardisation Activities......Page 272
4.1 Project Overview......Page 273
4.2 BRIDGE Hardware Developments......Page 276
5 Privacy Concerns......Page 279
6 Regulations......Page 280
7 Conclusion......Page 281
The World’s Smallest RFID Chip Technology......Page 283
2.1 Chip Architecture......Page 284
2.3 High-Reliability Electron Beam Written ID Memory......Page 285
3.2 External Antenna on Double-Surface Electrode Chip......Page 288
4 Silicon on Insulator (SOI) Ultra-thin RFID Chip......Page 291
RF and Low Power Analog Design for RFID......Page 294
2 Rectifiers for UHF and HF RFID Tags......Page 295
2.1 General Rectifier Topologies......Page 296
2.2 UHF Rectifier Design......Page 297
2.3 HF Rectifier Design......Page 303
3 Power Management Design for RFID......Page 304
3.1 RF Limiter Design......Page 305
3.2 DC Limiter Design......Page 307
3.3 Regulator Design......Page 308
4.1 Data Receiver Design......Page 310
4.2 Data Slicer Design......Page 312
4.3 Additional RFID Circuits......Page 314
6 Conclusions......Page 315
References......Page 316
2 HF and UHF Power Generation with One Antenna Port......Page 321
2.1 Power Generator Architecture......Page 323
2.2 Multi Frequency Rectifier......Page 324
2.3 DC/DC Down Converter......Page 326
2.4 DC/DC Up Converter......Page 327
3 Local Oscillator......Page 328
4.1 HF RxD Unit......Page 330
4.2 UHF RxD Unit......Page 331
4.3 Shunt, TxD—Load Modulator and Backscatter Unit......Page 332
5 Conclusions......Page 334
1 Introduction......Page 336
2 Printed Electronics......Page 337
3 First Printed Circuits......Page 339
3.1 Printed Ring Oscillator......Page 340
3.2 Printed 4-Bit Manchester Chip......Page 341
4.1 Roadmap for Organic Electronics......Page 342
4.2 Roadmap for Printed RFID......Page 344
4.3 First RFID Products......Page 346
References......Page 347
2.1 Technology......Page 350
2.2 The RFID Measurement Setup......Page 352
2.3 Organic Transponder Chip......Page 353
2.4 Organic Rectifier......Page 354
2.5 Organic RFID Tag Using DC Load Modulation......Page 356
3 Methods to Increase Robustness of Digital Circuits......Page 358
3.1 Organic RFID Transponder Chip with Dual-Gate Architecture......Page 361
4 Vision for Commercialization......Page 362
5 A 50 kHz RFID Transponder Chip......Page 363
6 Conclusions......Page 368