## Abstract We investigate on linearization performance of a digital predistortion (DPD) linearization technique based on the low memory power amplifier (PA) for wideband signals. The low memory PA is implemented using a 90W PEP LDMOSFET at 2.14 GHz, and an envelope short matching topology is appli
An open-loop digital predistorter based on memory polynomial inverses for linearization of RF power amplifier
โ Scribed by Yuelin Ma; Songbai He; Yoshihiko Akaiwa; Yasushi Yamao
- Publisher
- John Wiley and Sons
- Year
- 2011
- Tongue
- English
- Weight
- 593 KB
- Volume
- 21
- Category
- Article
- ISSN
- 1096-4290
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โฆ Synopsis
Digital Predistorter is a cost-effective solution to compensate for the nonlinear distortions appearing in the RF power amplifiers (PAs). The indirect learning scheme is widely implemented because of its flexibility to eliminate the requirement for building a closed-loop real time system, which dramatically reduces the complexity for measurement setup. However, such scheme is sensitive to the measurement noise that may cause biasing in the coefficients estimation. To minimize the influence of measurement noise and simultaneously enable the open-loop implementation, we propose a predistortion technique that first model the PA and then generates predistorted signal iteratively through a feedback configured structure to avoid using the noisy signal when performing the inverse model estimation. Unlike the indirect learning which estimates the postinverse of the PA, our predistortion is based on the preinverse of the PA. Both simulations and measurements show that utilizing the proposed predistortion can obtain adjacent channel power ratio (ACPR) improvement in wideband code division multiple access (WCDMA) signal test compared with the conventional memory polynomial predistortion based on indirect learning.
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