✦ LIBER ✦
An efficient reduction algorithm for computation of interconnect delay variability for statistical timing analysis in clock tree planning
✍ Scribed by Sivakumar Bondada; Soumyendu Raha; Santanu Mahapatra
- Book ID
- 107590224
- Publisher
- Indian Academy of Sciences
- Year
- 2010
- Tongue
- English
- Weight
- 226 KB
- Volume
- 35
- Category
- Article
- ISSN
- 0256-2499
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