✦ LIBER ✦
An advanced DSP systolic-array architecture: S B Leeland (Motorola Inc., Chandler, AZ, USA) Computer (USA), vol. 20, no. 7, pp. 95–96 (July 1987)
- Publisher
- Elsevier Science
- Year
- 1988
- Tongue
- English
- Weight
- 93 KB
- Volume
- 19
- Category
- Article
- ISSN
- 0026-2692
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✦ Synopsis
An advanced digital signal processing systolic-array architecture currently under development is described. Aspects of the architecture that give improved performance are examined. Architecture simulations have reconfirmed that the design performs best on algorithms with strong locality of signal flow. (4 refs.)
The systolic/cellular system for signal processing