An ADC controller and MOS buffer for the laboratory-oriented computer

✍ Scribed by Charles W. Brandon; John W. Cox Jr.; Francis W. Keller; Daniel A. Brody

• Book ID: 103050410
• Publisher: Elsevier Science
• Year: 1972
• Tongue: English
• Weight: 579 KB
• Volume: 5
• Category: Article
• ISSN: 0010-4809
• DOI: 10.1016/0010-4809(72)90090-0

✦ Synopsis

This work describes a relatively inexpensive device constructed for use on computers without DMA or API that has the effect of freeing considerable amounts of CP time while digitizing large numbers of channels at relatively high sampling rates. The device consists of the logic needed to control the analog-to-digital conversion, and a MOS shift-register buffer to provide temporary storage of from 1 to 64 channels of multiplexed analog input. After all channels have been converted, the computer receives a single interrupt at which time it reads the converted values from the shift-register memory into the computer at maximum speed. Although the unit has been constructed especially for the PDP-7 computer, it is described in such a way as to allow its implementation on many different computer systems.