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An 8-bit CMOS 3.3-V 65-MHz digital-to-analog converter with a symmetric two-stage current cell matrix architecture

✍ Scribed by Ji Hyun Kim; Kwang Sub Yoon


Book ID
119944754
Publisher
IEEE
Year
1998
Tongue
English
Weight
397 KB
Volume
45
Category
Article
ISSN
1057-7130

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