This paper presents a method for multiplexing C-3 payload according to the ITU-T recommendations G.707, G.708 and G.709. Our technique eliminates signal rate variations, which occur in various multiplexing structures in the synchronous digital hierarchy (SDH) networks, by using a buffer. Calculation
Algorithms for determining capacities of individual buffers in assembly/disassembly systems
β Scribed by Keun-Chae Jeong; Yeong-Dae Kim
- Publisher
- Elsevier Science
- Year
- 1997
- Tongue
- English
- Weight
- 359 KB
- Volume
- 33
- Category
- Article
- ISSN
- 0360-8352
No coin nor oath required. For personal study only.
β¦ Synopsis
We deal with a buffer allocation problem of assemblyldisassembly (AD) systarna with β’ finite buffer cepecity. The problem is to determine capacities of individual buffers for a given total evlilable capacity of buffers with the objective of maximizing throughput rate. We first present an algorithm (BAG) in which a conventional gradient search is used for finding an initial solution and s two-o~imization procedure la used for improving the initial solution. Since this algorithm may require an excessive computation time, eq:)enially when a procedure for performance evaluation employed in the algorithm takes a long computation time, a new algorithm (BA-P) is developed in which a sophisticated procedure is used for finding an Initial solution. In this procedure, capacities of individual buffers are determined based on the effioiency of their upstream end downstream machines. Results of computational experiments show that the latter algorithm gives the same solutions as those obtained by the former algorithm in much shorter time.
π SIMILAR VOLUMES
The authors study a discrete-time, infinite-horizon, dynamic programming model for the replacement of components in a binary k-out-of-n failure system. (The system fails when k or more of its n components fail.) Costs are incurred when the system fails and when failed components are replaced. The ob