Discussing algorithmic aspects of VLSI layout, this text includes coverage of: issues in timing driven layout; LP formulation of global routeing and placement; Stockmeyer's floorplan optimization technique; the Manhattan and knock-knee routeing modes; and parallel algorithms for placement.
Algorithmic aspects of VLSI layout
β Scribed by Majid Sarrafzadeh; Der-Tsai Lee
- Publisher
- World Scientific
- Year
- 1993
- Tongue
- English
- Leaves
- 405
- Series
- Lecture notes series on computing, v. 2
- Category
- Library
No coin nor oath required. For personal study only.
β¦ Synopsis
Discussing algorithmic aspects of VLSI layout, this text includes coverage of: issues in timing driven layout; LP formulation of global routeing and placement; Stockmeyer's floorplan optimization technique; the Manhattan and knock-knee routeing modes; and parallel algorithms for placement
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