β Scribed by Xiaolin Chen, Nishan Canagarajah, Jose L. Nunez-Yanez (auth.), Guy Gogniat, Dragomir Milojevic, Adam Morawiec, Ahmet Erdogan (eds.)
No coin nor oath required. For personal study only.
Advances in signal and image processing together with increasing computing power are bringing mobile technology closer to applications in a variety of domains like automotive, health, telecommunication, multimedia, entertainment and many others. The development of these leading applications, involving a large diversity of algorithms (e.g. signal, image, video, 3D, communication, cryptography) is classically divided into three consecutive steps: a theoretical study of the algorithms, a study of the target architecture, and finally the implementation. Such a linear design flow is reaching its limits due to intense pressure on design cycle and strict performance constraints. The approach, called Algorithm-Architecture Matching, aims to leverage design flows with a simultaneous study of both algorithmic and architectural issues, taking into account multiple design constraints, as well as algorithm and architecture optimizations, that couldnβt be achieved otherwise if considered separately. Introducing new design methodologies is mandatory when facing the new emerging applications as for example advanced mobile communication or graphics using sub-micron manufacturing technologies or 3D-Integrated Circuits. This diversity forms a driving force for the future evolutions of embedded system designs methodologies.
The main expectations from system designersβ point of view are related to methods, tools and architectures supporting application complexity and design cycle reduction. Advanced optimizations are essential to meet design constraints and to enable a wide acceptance of these new technologies.
Algorithm-Architecture Matching for Signal and Image Processing presents a collection of selected contributions from both industry and academia, addressing different aspects of Algorithm-Architecture Matching approach ranging from sensors to architectures design. The scope of this book reflects the diversity of potential algorithms, including signal, communication, image, video, 3D-Graphics implemented onto various architectures from FPGA to multiprocessor systems. Several synthesis and resource management techniques leveraging design optimizations are also described and applied to numerous algorithms.
Algorithm-Architecture Matching for Signal and Image Processing should be on each designerβs and EDA tool developerβs shelf, as well as on those with an interest in digital system design optimizations dealing with advanced algorithms.
Front Matter....Pages I-XI
Front Matter....Pages 1-1
Lossless Multi-Mode Interband Image Compression and Its Hardware Architecture....Pages 3-26
Efficient Memory Management for Uniform and Recursive Grid Traversal....Pages 27-51
Mapping a Telecommunication Application on a Multiprocessor System-on-Chip....Pages 53-77
Front Matter....Pages 79-79
A Standard 3.5T CMOS Imager Including a Light Adaptive System for Integration Time Optimization....Pages 81-93
Approximate Multiplication and Division for Arithmetic Data Value Speculation in a RISC Processor....Pages 95-116
RANN: A Reconfigurable Artificial Neural Network Model for Task Scheduling on Reconfigurable System-on-Chip....Pages 117-144
A New Three-Level Strategy for Off-Line Placement of Hardware Tasks on Partially and Dynamically Reconfigurable Hardware....Pages 145-169
End-to-End Bitstreams Repository Hierarchy for FPGA Partially Reconfigurable Systems....Pages 171-194
Front Matter....Pages 195-195
SystemC Multiprocessor RTOS Model for Services Distribution on MPSoC Platforms....Pages 197-215
A List Scheduling Heuristic with New Node Priorities and Critical Child Technique for Task Scheduling with Communication Contention....Pages 217-236
Multiprocessor Scheduling of Dataflow Programs within the Reconfigurable Video Coding Framework....Pages 237-251
A High Level Synthesis Flow Using Model Driven Engineering....Pages 253-274
Generation of Hardware/Software Systems Based on CAL Dataflow Description....Pages 275-292
Back Matter....Pages 293-296
Signal, Image and Speech Processing; Processor Architectures; Algorithms
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