β Scribed by G. Edward Suh; Charles W. O'Donnell; Srinivas Devadas
No coin nor oath required. For personal study only.
This article presents the AEGIS secure processor architecture, which enables new applications by ensuring private and authentic program execution even in the face of physical attack. Our architecture uses two new primitives to achieve physical security. First, we describe Physical Random Functions which reliably protect and share secrets in a manner that is cheaper and more secure than existing solutions based on non-volatile memory. Second, off-chip memory protection mechanisms ensure the integrity and the privacy of off-chip memory. Our processor, with its new protection mechanisms, has been implemented on an FPGA, and is fully functional. We briefly assess the cost of the security mechanisms in our processor and show that it is reasonable.
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The growing demand for multimedia applications such as digital television, video teleconferencing, machine vision, office automation products, digital cameras and camcorders, and medical imaging has created a need for a processor capable of meeting the challenging computing requirements these applic
This article describes an implementation of a flexible videoconferencing system, the Sony Mini-1000, which is based on the Texas Instruments TMS320C80, a multiprocessor DSP, with software from IAT, Texas Instruments, and Sony. The H.320 videoconferencing standard used in the Mini-1000 is described w