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Advanced Hardware Design for Error Correcting Codes

✍ Scribed by Chavet, Cyrille;Coussy, Philippe

Publisher
Springer International Publishing
Year
2015
Tongue
English
Leaves
197
Category
Library
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✦ Table of Contents

User Needs --
Challenges and Limitations for Very High Throughput Decoder Architectures for Soft-Decoding --
Implementation of Polar Decoders --
Parallel architectures for Turbo Product Codes Decoding --
VLSI implementations of sphere detectors --
Stochastic Decoders for LDPC Codes --
MP-SoC/NoC architectures for error correction --
ASIP design for multi-standard channel decoders --
Hardware design of parallel interleaver architecture: a survey.

✦ Subjects

Códigos de corrección (Teoría de la información);Computers;Electrical engineering;Electronic circuits;Engineering;Sistemas de información;Códigos de corrección (Teoría de la información);Sistemas de información

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