[ACM Press the 2005 conference - Shanghai, China (2005.01.18-2005.01.21)] Proceedings of the 2005 conference on Asia South Pacific design automation - ASP-DAC '05 - Sleep transistor sizing using timing criticality and temporal currents

✍ Scribed by Ramalingam, Anand; Zhang, Bin; Devgan, Anirudh; Pan, David Z.

• Book ID: 118213100
• Publisher: ACM Press
• Year: 2005
• Tongue: English
• Weight: 356 KB
• Volume: 0
• Category: Article
• ISBN-13: 9780780387379
• DOI: 10.1145/1120725.1120832

✦ Synopsis

Power gating is a circuit technique that enables high performance and low power operation. One of the challenges in power gating is sizing the sleep transistor which is used to gate the power supply. This paper presents a new methodology based on timing criticality and temporal currents to size the sleep transistor. The timing criticality information and temporal current estimation are obtained using static timing analyzer. The results obtained indicate that our proposed technique results in area reduction of sleep transistors by 80% and 49% compared to module based design and cluster based design respectively.