The implementation and performance of a turbo/MAP decoder are described. A serial block MAP decoder operating in the logarithm domain is used to obtain a very-high-performance turbo decoder. Programmable gate arrays and EPROMs allow the decoder to be programmed for almost any code from four to 512 s
A VLSI implementation study of a 10 Mbit/s video decoder
โ Scribed by P.R Burfield; M Gandini; P Garino; G.C Ghigo
- Publisher
- Elsevier Science
- Year
- 1993
- Tongue
- English
- Weight
- 994 KB
- Volume
- 5
- Category
- Article
- ISSN
- 0923-5965
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