✦ LIBER ✦
A Unified Approach for Full Chip Statistical Timing and Leakage Analysis of Nanoscale Circuits Considering Intradie Process Variations
✍ Scribed by Bhardwaj, S.; Vrudhula, S.; Goel, A.
- Book ID
- 117908165
- Publisher
- IEEE
- Year
- 2008
- Tongue
- English
- Weight
- 951 KB
- Volume
- 27
- Category
- Article
- ISSN
- 0278-0070
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