✦ LIBER ✦
A technique for the design of systolic arrays with bit-level pipelining: B B Madan (Dept. of Comput. Sci. & Eng., ITT, New Delhi, India), S R Parker, M Zubair Circuits Syst. & Signal Process. (USA) vol. 6, no. 2, pp. 139–151 (1987)
- Publisher
- Elsevier Science
- Year
- 1988
- Tongue
- English
- Weight
- 75 KB
- Volume
- 19
- Category
- Article
- ISSN
- 0026-2692
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