MARS: a RISC-based architecture for Lisp
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Hung-Chang Lee; Feipei Lai; Jenn-Yuan Tsai; Tai-Ming Parng
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Article
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1990
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Elsevier Science
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English
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A RISC-based chip set architecture for Lisp is presented in this paper. This architecture contains an instruction fetch unit (IFU) and three processing units--integer processing unit (IPU), floating-point processing unit (FPU), and list processing unit (LPU). The IFU feeds instructions to the proces