Due to the shrinking of feature size and significant reduction in noise margins, nanoscale circuits have become more susceptible to manufacturing defects, interference from radiation and noise-related transient faults. Many of these faults are not permanent in nature but their occurrence can result
A proposal for the implementation of ternary digital circuits
โ Scribed by N.V. Serran; A. Martins Jorge; J.A. Siqueira Dias
- Publisher
- Elsevier Science
- Year
- 1997
- Tongue
- English
- Weight
- 606 KB
- Volume
- 28
- Category
- Article
- ISSN
- 0026-2692
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โฆ Synopsis
A non-classica1 multi-valued logie based on Post algebra is presented. Besides the convmentional Post's cyclic negation, this non-classical logie algebra defines new operators that simplify the truth-table minimization techniques. An electronie implementation of this algebra for a three-leve1 logie is proposed. Electronics gates of Post negation and the new operators were designed and simulated using current mode circuits. These gates can be easily interconnected to form flip-flops, counters and other conventional digital gates in a true three-leve1 gate logie. A.SICs with mixed analogJdigita1 high-speed processing can benefit from this current processing temary logie, which can be easily implemented in bipolar technology.
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