✦ LIBER ✦

A processor-sharing model for input-buffered ATM-switches in a correlated traffic environment

✍ Scribed by K. Laevens

Book ID: 108400815
Publisher: Elsevier Science
Year: 1999
Tongue: English
Weight: 172 KB
Volume: 22
Category: Article
ISSN: 0141-9331
DOI: 10.1016/s0141-9331(99)00003-4

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

SKEL: A fundamental property desirable i

SKEL: A fundamental property desirable in ATM switches for simple traffic management - illustrations with generic output-buffered and input-buffered switches

✍ Soung C. Liew; Tony T. Lee 📂 Article 📅 1996 🏛 Elsevier Science 🌐 English ⚖ 991 KB

Methods for storing arriving cells in a

Methods for storing arriving cells in a shared multi-buffer ATM switch

✍ Atsushi Shibata; Hiroshi Inai; Jiro Yamakita 📂 Article 📅 1999 🏛 John Wiley and Sons 🌐 English ⚖ 195 KB 👁 1 views

A shared multi-buffer ATM switch is cost-effective, since it uses low-access-speed memories when compared with a shared single-buffer ATM switch. Due to the low access speed, however, the switch cannot read several cells from a buffer during a single access. Such an access conflict provides a high c

Buffer losses vs. deadline violations fo

Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

✍ Meera Balakrishnan; Antonio Puliafito; Kishor Trivedi; Yannis Viniotis 📂 Article 📅 1997 🏛 Springer US 🌐 English ⚖ 467 KB