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A Procedure for Placement of Standard-Cell VLSI Circuits

✍ Scribed by Dunlop, A.E.; Kernighan, B.W.

Book ID
118698159
Publisher
IEEE
Year
1985
Tongue
English
Weight
966 KB
Volume
4
Category
Article
ISSN
0278-0070

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Cell placement is an important phase of current VLSI circuit design styles such as standard cell, gate array, and Field Programmable Gate Array (FPGA). Although nondeterministic algorithms such as Simulated Annealing (SA) were successful in solving this problem, they are known to be slow. In this pa