𝔖 Bobbio Scriptorium
✦   LIBER   ✦

A placement algorithm for logic schematics

✍ Scribed by S.S. Marathe; R.R. Joshi

Publisher
Elsevier Science
Year
1982
Tongue
English
Weight
139 KB
Volume
14
Category
Article
ISSN
0010-4485

No coin nor oath required. For personal study only.

πŸ“œ SIMILAR VOLUMES

Placement and routing for logic schemati
Placement and routing for logic schematics
✍ Michael May; Alfred Iwainsky; Peter Mennecke πŸ“‚ Article πŸ“… 1983 πŸ› Elsevier Science 🌐 English βš– 639 KB
Placement algorithms for custom VLSI
Placement algorithms for custom VLSI
✍ Kenneth J. Supowit; Eric A. Slutz πŸ“‚ Article πŸ“… 1984 πŸ› Elsevier Science 🌐 English βš– 638 KB
Placement Algorithms for Hierarchical Co
Placement Algorithms for Hierarchical Cooperative Caching
✍ Madhukar R Korupolu; C.Greg Plaxton; Rajmohan Rajaraman πŸ“‚ Article πŸ“… 2001 πŸ› Elsevier Science 🌐 English βš– 286 KB

Consider a hierarchical network in which each node periodically issues a request for an object drawn from a fixed set of unit-size objects. Suppose further that the following conditions are satisfied: the frequency with which each node accesses each object is known; each node has a cache of known ca

A fast neural-network algorithm for VLSI
A fast neural-network algorithm for VLSI cell placement
✍ Cevdet Aykanat; Tevfik Bultan; Δ°smail Haritaoğlu πŸ“‚ Article πŸ“… 1998 πŸ› Elsevier Science 🌐 English βš– 423 KB

Cell placement is an important phase of current VLSI circuit design styles such as standard cell, gate array, and Field Programmable Gate Array (FPGA). Although nondeterministic algorithms such as Simulated Annealing (SA) were successful in solving this problem, they are known to be slow. In this pa